LBB1_57:        #bb207.i
        movl 72(%esp), %ecx
        movb (%ecx,%eax), %cl
        movl 80(%esp), %edx
        movb %cl, 1(%edx,%eax)
        incl %eax
        cmpl $143, %eax
        jne LBB1_57     #bb207.i
        jmp LBB1_64     #cond_next255.i

intead of:

LBB1_57:        #bb207.i
        movl 72(%esp), %ecx
        movb (%ecx,%eax), %cl
        movl 80(%esp), %edx
        movb %cl, 1(%edx,%eax)
        incl %eax
        cmpl $143, %eax
        je LBB1_64      #cond_next255.i
        jmp LBB1_57     #bb207.i

This eliminates a branch per iteration of the loop.  This hurted PPC
particularly, because the extra branch meant another dispatch group for each
iteration of the loop.

llvm-svn: 31530

llvm-svn: 31526

int func(vFloat v0, vFloat v1) {
        int ii;
        vSInt32 vsiidx[2];
        vsiidx[0] = _mm_cvttps_epi32(v0);
        vsiidx[1] = _mm_cvttps_epi32(v1);
        ii = ((int *) vsiidx)[4];
        return ii;
}

This fixes Transforms/ScalarRepl/2006-11-07-InvalidArrayPromote.ll

llvm-svn: 31524

llvm-svn: 31522

llvm-svn: 31521

shuffle v, undef, <2, ?, 3, ?>
to movhlps
It should match to unpckhps instead.

Added proper matching code for
shuffle v, undef, <2, 3, 2, 3>

llvm-svn: 31519

llvm-svn: 31517

llvm-svn: 31516

llvm-svn: 31515

llvm-svn: 31514

llvm-svn: 31513

llvm-svn: 31512

llvm-svn: 31511

Allow loop detection during debug in forwarding nodes, and revert auxcall patch as it make 176.gcc untenable

llvm-svn: 31510

llvm-svn: 31509

empty ranges.

2. Reorg how MachineDebugInfo maintains changes to debug labels.

3. Have dwarf writer use debug label info to simplify scopes and source line
coorespondence.

4. Revert the merging of compile units until I can get the bugs ironed out.

llvm-svn: 31507

llvm-svn: 31506

by 40%, FreeBench/fourinarow by 20%, and many other programs 10-25%.

On PPC, this speeds up fourinarow by 18%, and probably other things as well.

llvm-svn: 31504

llvm-svn: 31500

llvm-svn: 31498

X86.  If happy, I'll enable this by default.

llvm-svn: 31493

llvm-svn: 31492

The low part goes in the first operand of expandop, not the second one.

llvm-svn: 31487

llvm-svn: 31485

llvm-svn: 31478

llvm-svn: 31477

NOTE: There doesn't seem to be consistency for whether a leading tab
is present in a section heading.

llvm-svn: 31475

llvm-svn: 31474

llvm-svn: 31473

llvm-svn: 31464

llvm-svn: 31463

llvm-svn: 31462

llvm-svn: 31460

llvm-svn: 31459

llvm-svn: 31458

their scope are being deleted.  Workaround is to widen scope to full function.

llvm-svn: 31454

llvm-svn: 31453

llvm-svn: 31450

that takes a register and condition code.  Print these pieces of BLR the
right way, even though it is currently set to 'always'.

Next up: get the JIT encoding right, then enhance branch folding to produce
predicated blr for simple examples.

llvm-svn: 31449

there may be other def(s) apart from the use&def two-address operand. We need
to check if the register reuse for a use&def operand may conflicts with another
def. Provide a mean to recover from the conflict if it is detected when the
defs are processed later.

llvm-svn: 31439