llvm-svn: 99842

isn't used by anyone and is better exposed as a non-per-timer 
thing.  Also, stop including System/Mutex.h in Timer.h

llvm-svn: 99841

llvm-svn: 99840

eliminate the per-timer lock (timers should be 
externally locked if needed), the info-output-stream
can never be dbgs(), so drop the check.  Make some
stuff private.

llvm-svn: 99839

makes calls a little bit more consistent and allows easy removal of the
specializations in the future. Convert all callers to the templated functions.

llvm-svn: 99838

llvm-svn: 99836

the SDNodes.

llvm-svn: 99835

llvm-svn: 99834

llvm-svn: 99833

not stop it by using RAII.

llvm-svn: 99832

llvm-svn: 99831

Most of these were unused, some of them were wrong and unused (isS16Constant<short>,
isS10Constant<short>).

llvm-svn: 99827

llvm-svn: 99826

John Tytgat

llvm-svn: 99825

llvm-svn: 99824

llvm-svn: 99820

"the bigstack patch for SPU, with testcase. It is essentially the patch committed as 97091, and reverted as 97099, but with the following additions:
-in vararg handling, registers are marked to be live, to not confuse the register scavenger
-function prologue and epilogue are not emitted, if the stack size is 16. 16 means it is empty - there is only the register scavenger emergency spill slot, which is not used as there is no stack."

llvm-svn: 99819

llvm-svn: 99818

This is same as r99772 (which was reverted) with just one meaningful difference where two source lines exchanged their positions.

llvm-svn: 99816

llvm-svn: 99815

doesn't need to be stable because the patterns are fully ordered.

Add a first level sort predicate that orders patterns in this
order:  1) scalar integer operations 2) scalar floating point 
3) vector int 4) vector float.  This is a trivial sort on their
top level pattern type so it is nice and transitive.  The
benefit of doing this is that simple integer operations are
much more common than insane vector things and isel was trying
to match the big complex vector patterns before the simple
ones because the complexity of the vector operations was much
higher.  Since they can't both match, it is best (for compile
time) to try the simple integer ones first.

This cuts down the # failed match attempts on real code by
quite a bit, for example, this reduces backtracks on crafty
(as a random example) from 228285 -> 188369.

llvm-svn: 99797

llvm-svn: 99796

patterns within the generated matcher.  This works great except
that the sort fails because the relation defined isn't 
transitive.  I have a much simpler solution coming next, but want
to archive the code.

llvm-svn: 99795

comment in the generated table.

llvm-svn: 99794

These instructions use byte index in a control vector (M:Vm) to lookup byte
values in a table and generate a new vector (D:Vd).  The table is specified via
a list of vectors, which can be:

{Dn}
{Dn D<n+1>}
{Dn D<n+1> D<n+2>}
{Dn D<n+1> D<n+2> D<n+3>}

llvm-svn: 99789

llvm-svn: 99778

llvm-svn: 99774

llvm-svn: 99772

llvm-svn: 99770

Otherwise, e.g. in the invocation like clang -DFOO=\"bar\" FOO macro
got the bar value, not "bar".

Patch by Alexander Esilevich!

llvm-svn: 99763

SELinux doesn't allow 'execmem', returning MAP_FAILED and 'Permission denied'
for mmap or RWX memory. In this case AllocateRWX was returning a MemoryBlock
with uninitialized fields, which sometimes caused crashes.

This patch initializes MemoryBlock fields to 0, so that the RWX-failure check
works.
It doesn't fix the SELinux 'execmem' issues though (the JIT will not work when
SELinux is in enforcing mode).

llvm-svn: 99762

where an incorrect number of operands is provided to an sdnode instead
of just a few cases.

llvm-svn: 99761

llvm-svn: 99760

and those derived from them.  These are obnoxious because
they were written as: PatLeaf<(bitconvert).  Not having an
argument was foiling adding better type checking for operand
count matching up with what was required (in this case,
bitconvert always requires an operand!)

llvm-svn: 99759

matchable: it seems like it would always constant fold.

llvm-svn: 99758

this also depends on the new "bitconvert dropping" behavior just
added to tblgen.

llvm-svn: 99757

transforming it into (add (i32 GPR), 4).  This allows us to write type
generic multi patterns and have tblgen automatically drop the bitconvert
in the case when the types align.  This allows us to fold an extra load
in the changed testcase.

llvm-svn: 99756

llvm-svn: 99755

input to be v8i8 or v16i8, which buildvectors get canonicalized to.

This allows the patterns that were previously using a bare 'vnot' to
match, before they couldn't.

llvm-svn: 99754

patterns that would never match because of bitcast, and eliminating use
of vnot_conv.

llvm-svn: 99753