llvm-svn: 24611

llvm-svn: 24609

llvm-svn: 24607

1. Remove redundant type casts now that PR673 is implemented.
2. Implement the OUT*ir instructions correctly.  The port number really
   *is* a 16-bit value, but the patterns should only match if the number
   is 0-255.  Update the patterns so they now match.
3. Fix patterns for shifts to reflect that the shift amount is always an
   i8, not an i16 as they were believed to be before.  This previous fib
   stopped working when we started knowing that CL has type i8.
4. Change use of i16i8imm in SH*ri patterns to all be imm.

llvm-svn: 24599

being shifted.  Don't assume they are.

llvm-svn: 24598

Add some explicit type casts so that tblgen knows the type of the shiftamount, which is not necessarily the same as the type being shifted.

llvm-svn: 24595

amount, which is not necessarily the same as the type being shifted.

llvm-svn: 24594

llvm-svn: 24592

improvements.

llvm-svn: 24591

llvm-svn: 24590

llvm-svn: 24589

llvm-svn: 24588

  chains.
* Added DAG node property SDNPHasChain for nodes which r/w control-flow
  chains.
* Renamed SDTVT to SDTOther.
* Added several new SDTypeProfiles for BR, BRCOND, RET, and WRITEPORT.
* Added SDNode definitions for BR, BRCOND, RET, and WRITEPORT.

llvm-svn: 24586

llvm-svn: 24585

This also fixes 177.mesa, the only program that fails with --enable-x86-fastcc
turned on.  Given a clean nightly tester run, we should be able to turn it
on by default!

llvm-svn: 24578

llvm-svn: 24572

stuff isn't using ISelLowering.cpp

llvm-svn: 24567

llvm-svn: 24566

llvm-svn: 24564

work.  This change has no effect on generated code.

llvm-svn: 24563

llvm-svn: 24562

llvm-svn: 24561

llvm-svn: 24560

llvm-svn: 24559

llvm-svn: 24558

llvm-svn: 24552

llvm-svn: 24551

llvm-svn: 24550

llvm-svn: 24549

llvm-svn: 24547

llvm-svn: 24542

an argument to every operand printing function.  Requires some slight
tweaks to x86, the only user.

llvm-svn: 24541

llvm-svn: 24538

llvm-svn: 24536

llvm-svn: 24535

changes allow us to generate the following code:

_foo:
        li r2, 0
        lvx v0, r2, r3
        vaddfp v0, v0, v0
        stvx v0, r2, r3
        blr

for this llvm:

void %foo(<4 x float>* %a) {
entry:
        %tmp1 = load <4 x float>* %a
        %tmp2 = add <4 x float> %tmp1, %tmp1
        store <4 x float> %tmp2, <4 x float>* %a
        ret void
}

llvm-svn: 24534

Getting in on the custom lowering thing, yay
evilness with fp setcc, yuck
trivial int select, hmmm
in memory args for functions, yay
DIV and REM, always handy.  They should be custom lowered though.

Lots more stuff compiles now (go go single source!).  Of course, none of it
probably works, but that is what the nightly tester can find out :)

llvm-svn: 24533

llvm-svn: 24526

llvm-svn: 24525

llvm-svn: 24522