Define COMPILER_RT_CAN_EXECUTE_TESTS variable on platforms where we can produce working binaries and use it in build rules for sanitizers tests

llvm-svn: 171160

instructions. This just exposes the already present reverse iterators of
the instruction ilist.

llvm-svn: 171159

re-use that for SlotIndexes. This way other users who want half-open
semantics can share the implementation.

llvm-svn: 171158

getAnalysisUsage implementations.

llvm-svn: 171157

This came up for the N+1'st time today in IRC.

llvm-svn: 171155

llvm-svn: 171154

[ASan] Fix lifetime intrinsics handling. Now for each intrinsic we check if it describes one of 'interesting' allocas. Assume that allocas can go through casts and phi-nodes before apperaring as llvm.lifetime arguments

llvm-svn: 171153

llvm-svn: 171152

llvm-svn: 171151

llvm-svn: 171150

llvm-svn: 171149

register. In most cases we actually compare or select YMM-sized registers
and mixing the two types creates horrible code. This commit optimizes
some of the transition sequences.

PR14657.

llvm-svn: 171148

llvm-svn: 171147

The vector truncs were scalarized during LegalizeVectorOps, later vectorized again by some DAGCombine optimization
and finally, lowered by a dagcombing optimization. Now, they are properly lowered during LegalizeVectorOps.
No new testcase because the original testcases still work.

llvm-svn: 171146

[asan] relax asan/lit_tests/malloc_delete_mismatch.cc to make it pass on Mac 10.7 (where extra frames creep in between malloc and main)

llvm-svn: 171145

[asan/tsan] when unmapping a chunk of user memory, apply madvise(MADV_DONTNEED) to the corresponding chunk of shadow memory. Also update sanitizer_allocator64_testlib.cc

llvm-svn: 171144

llvm-svn: 171143

Refactor DAGCombinerInfo. Change the different booleans that indicate if we are before or after different runs of DAGCo, with the CombineLevel enum.
Also, added a new API for checking if we are running before or after the LegalizeVectorOps phase. 

llvm-svn: 171142

Move single letter 'P' prefix out of multiclass now that tablegen allows defm to start with #NAME. This makes instruction names more searchable again.

llvm-svn: 171141

llvm-svn: 171140

The language linkage of redeclarations must match. GCC was already reporting
an error for this.

llvm-svn: 171139

Add hasSideEffects=0 to some shift and rotate instructions. None of which are currently used by code generation.

llvm-svn: 171137

llvm-svn: 171136

llvm-svn: 171135

TODO: This test should be moved to the backend.
llvm-svn: 171134

per compile unit/skeleton compile unit. Update tests accordingly.

llvm-svn: 171133

llvm-svn: 171132

llvm-svn: 171131

llvm-svn: 171130

llvm-svn: 171129

Add mayLoad, mayStore, and hasSideEffects tags to BT/BTS/BTR/BTC instructions. Shouldn't change any functionality since they don't have patterns to select them.

llvm-svn: 171128

llvm-svn: 171127

information doesn't return an addend for Rel relocations. Go ahead
and use this information to fix relocation handling inside dwarfdump
for 32-bit ELF REL.

llvm-svn: 171126

changes to fix Hexagon Relocation so that it accounts for the bitmask properly as documented in the ABI

llvm-svn: 171125

If all of the write objects are identified then we can vectorize the loop even if the read objects are unidentified.

PR14719.

llvm-svn: 171124

Fix operands and encoding form for ARPL instruction. Register form had  and  reversed. Memory form writes memory, but was marked as MRMSrcMem.

llvm-svn: 171123

llvm-svn: 171122

llvm-svn: 171121

llvm-svn: 171120

such as by a compiler warning, a check in clang -fsanitizer=undefined, being
optimized to unreachable, or a combination of the above. PR14722.

llvm-svn: 171119