mismatch against the enum table.
This is a part of Sabre's master plan to drive me nuts with subtle bugs that
happens to only affect x86 be. :-)

llvm-svn: 27237

sure to build it as SHUFFLE(X, undef, mask), not SHUFFLE(X, X, mask).

The later is not canonical form, and prevents the PPC splat pattern from
matching.  For a particular splat, we go from generating this:

	li r10, lo16(LCPI1_0)
	lis r11, ha16(LCPI1_0)
	lvx v3, r11, r10
	vperm v3, v2, v2, v3

to generating:

	vspltw v3, v2, 3

llvm-svn: 27236

llvm-svn: 27235

llvm-svn: 27234

vector_shuffle node.  For this:

void test(__m128 *res, __m128 *A, __m128 *B) {
  *res = _mm_unpacklo_ps(*A, *B);
}

we now produce this code:

_test:
        movl 8(%esp), %eax
        movaps (%eax), %xmm0
        movl 12(%esp), %eax
        unpcklps (%eax), %xmm0
        movl 4(%esp), %eax
        movaps %xmm0, (%eax)
        ret

instead of this:

_test:
        subl $76, %esp
        movl 88(%esp), %eax
        movaps (%eax), %xmm0
        movaps %xmm0, (%esp)
        movaps %xmm0, 32(%esp)
        movss 4(%esp), %xmm0
        movss 32(%esp), %xmm1
        unpcklps %xmm0, %xmm1
        movl 84(%esp), %eax
        movaps (%eax), %xmm0
        movaps %xmm0, 16(%esp)
        movaps %xmm0, 48(%esp)
        movss 20(%esp), %xmm0
        movss 48(%esp), %xmm2
        unpcklps %xmm0, %xmm2
        unpcklps %xmm1, %xmm2
        movl 80(%esp), %eax
        movaps %xmm2, (%eax)
        addl $76, %esp
        ret

GCC produces this (with -fomit-frame-pointer):

_test:
        subl    $12, %esp
        movl    20(%esp), %eax
        movaps  (%eax), %xmm0
        movl    24(%esp), %eax
        unpcklps        (%eax), %xmm0
        movl    16(%esp), %eax
        movaps  %xmm0, (%eax)
        addl    $12, %esp
        ret

llvm-svn: 27233

llvm-svn: 27232

llvm-svn: 27231

llvm-svn: 27230

llvm-svn: 27229

llvm-svn: 27228

llvm-svn: 27227

llvm-svn: 27226

llvm-svn: 27225

llvm-svn: 27224

llvm-svn: 27223

llvm-svn: 27222

llvm-svn: 27221

llvm-svn: 27220

llvm-svn: 27219

* Bug fixes.

llvm-svn: 27218

llvm-svn: 27217

llvm-svn: 27216

llvm-svn: 27215

llvm-svn: 27214

llvm-svn: 27213

llvm-svn: 27212

llvm-svn: 27211

- Some misc. bug fixes.
- Use MOVHPDrm to load from m64 to upper half of a XMM register.

llvm-svn: 27210

llvm-svn: 27209

llvm-svn: 27208

llvm-svn: 27207

llvm-svn: 27206

same thing and we have a dag node for the former.

llvm-svn: 27205

llvm-svn: 27204

llvm-svn: 27203

Tblgen doesn't like multiple SDNode<> definitions that map to the sameenum value.  Split them into separate enums.

Also, don't emit dynamic checks when we can compute them statically

llvm-svn: 27202

Tblgen doesn't like multiple SDNode<> definitions that map to the sameenum value.  Split them into separate enums.

llvm-svn: 27201

intrinsics as such.

llvm-svn: 27200

enum value.  Split them into separate enums.

llvm-svn: 27199

llvm-svn: 27198