- Feb 26, 2013
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Michael Ilseman authored
Use a DenseMap instead of a std::map for AnalysisID -> Pass* maps. This reduces the pass-manager overhead from FPPassManager::runOnFunction() by about 10%. llvm-svn: 176072
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Akira Hatanaka authored
No functionality change. llvm-svn: 176070
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Chad Rosier authored
arguments type is a simple type. rdar://13290455 llvm-svn: 176066
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Michael Liao authored
- Put expensive checking after simple one llvm-svn: 176060
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Michael Liao authored
- Check whether SSE is available before lowering all 1s vector building with PCMPEQD, which is only available from SSE2 llvm-svn: 176058
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Andrew Kaylor authored
This changes the RecordingMemoryManager in lli to use mapped memory rather than malloc to allocate memory for sections and uses a 'near' MemoryBlock to keep the allocations together. This works around a problem in MCJIT where relocations are applied to a generated image immediately oupon generation, which isn't appropriate for the remote case. llvm-svn: 176057
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- Feb 25, 2013
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Chad Rosier authored
llvm-svn: 176055
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Chad Rosier authored
llvm-svn: 176053
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Chad Rosier authored
fewer scalar integer (i32 or i64) arguments. It completely eliminates the need for SDISel for trivial functions. Also, add the new llc -fast-isel-abort-args option, which is similar to -fast-isel-abort option, but for formal argument lowering. llvm-svn: 176052
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Andrew Trick authored
Fixes rdar:13279013: scheduler was blowing up on select instructions. llvm-svn: 176037
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Chad Rosier authored
rdar://13254235 llvm-svn: 176036
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Renato Golin authored
llvm-svn: 176033
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Matt Beaumont-Gay authored
llvm-svn: 176031
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Bill Schmidt authored
Report and fix due to Kai Nacke. Testcase update by me. llvm-svn: 176029
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Chandler Carruth authored
llvm-svn: 176023
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Chandler Carruth authored
memory intrinsics in the SDAG builder. When alignment is zero, the lang ref says that *no* alignment assumptions can be made. This is the exact opposite of the internal API contracts of the DAG where alignment 0 indicates that the alignment can be made to be anything desired. There is another, more explicit alignment that is better suited for the role of "no alignment at all": an alignment of 1. Map the intrinsic alignment to this early so that we don't end up generating aligned DAGs. It is really terrifying that we've never seen this before, but we suddenly started generating a large number of alignment 0 memcpys due to the new code to do memcpy-based copying of POD class members. That patch contains a bug that rounds bitfield alignments down when they are the first field. This can in turn produce zero alignments. This fixes weird crashes I've seen in library users of LLVM on 32-bit hosts, etc. llvm-svn: 176022
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Reed Kotler authored
llvm-svn: 176007
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David Blaikie authored
llvm-svn: 176004
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Reed Kotler authored
llvm-svn: 176002
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- Feb 24, 2013
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Bill Schmidt authored
This removes a const_cast hack from PPCRegisterInfo::hasReservedSpillSlot(). The proper place to save the frame index for the CR spill slot is in the PPCFunctionInfo object, not the PPCRegisterInfo object. No new test cases, as this just reimplements existing function. Existing tests such as test/CodeGen/PowerPC/crsave.ll are sufficient. llvm-svn: 175998
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Benjamin Kramer authored
This is a common pattern with dyn_cast and similar constructs, when the PHI no longer depends on the select it can often be turned into a simpler construct or even get hoisted out of the loop. PR15340. llvm-svn: 175995
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Benjamin Kramer authored
llvm-svn: 175994
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Francois Pichet authored
llvm-svn: 175991
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Nadav Rotem authored
Fix PR15239. llvm-svn: 175985
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Reed Kotler authored
as early as possible; which means during instruction selection. llvm-svn: 175984
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Cameron Zwarich authored
builds. llvm-svn: 175981
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Cameron Zwarich authored
true when shouldOnlyCommute is false, so we can remove code that checks otherwise. llvm-svn: 175980
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Cameron Zwarich authored
itself recursively with a new instruction that has not been finalized, in order to determine whether to keep the instruction. On 'make check' and test-suite the only cases where the recursive invocation made any transformations were simple instruction commutations, so I am restricting the recursive invocation to do only this. The other cases wouldn't work correctly when updating LiveIntervals, since the new instructions don't have slot indices and LiveIntervals hasn't yet been updated. If the other transformations were actually triggering in any test case it would be possible to support it with a lot of effort, but since they don't it's not worth it. llvm-svn: 175979
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Reed Kotler authored
proper. Fixed this already a few days ago for slti. llvm-svn: 175975
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Cameron Zwarich authored
unless it was requested to with an optional parameter that defaults to false, so we don't need to handle that case in TwoAddressInstructionPass. llvm-svn: 175974
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- Feb 23, 2013
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Renato Golin authored
llvm-svn: 175965
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Renato Golin authored
llvm-svn: 175964
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Benjamin Kramer authored
Fixes PR15115. llvm-svn: 175962
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Cameron Zwarich authored
MachineInstrs don't have a slot index. llvm-svn: 175961
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Cameron Zwarich authored
running ASCI_Purple/SMG2000 in the test-suite. llvm-svn: 175957
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Cameron Zwarich authored
llvm-svn: 175956
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Cameron Zwarich authored
TwoAddressInstructionPass. The code in rescheduleMIBelowKill() is a bit tricky, since multiple instructions need to be moved down, one-at-a-time, in reverse order. llvm-svn: 175955
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Reed Kotler authored
macros.The rest is some small misc. stuff. llvm-svn: 175950
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Jim Grosbach authored
Handle an implied 'sp' operand. rdar://11466783 llvm-svn: 175940
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Michael Gottesman authored
rdar://13273675. llvm-svn: 175939
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