Commits · c4ce2293b0d55fa803270c6c00d6fbe2ebc9ade2 · Roger Ferrer / llvm-epi-0.8 · GitLab

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Jun 28, 2017
- Revert "[DAG] Fold FrameIndex offset into BaseIndexOffset analysis. NFCI." · c4ce2293
  Nirav Dave authored Jun 28, 2017
  c4ce2293
- [AMDGPU] Add pattern for v_alignbit_b32 with immediate · d4454556
  Stanislav Mekhanoshin authored Jun 28, 2017
  d4454556
- Allow to truncate left shift with non-constant shift amount · eb40733b
  Stanislav Mekhanoshin authored Jun 28, 2017
  eb40733b
- [DAG] Fold FrameIndex offset into BaseIndexOffset analysis. NFCI. · 8ef03802
  Nirav Dave authored Jun 28, 2017
  8ef03802
- Inlining: Don't re-map simplified cloned instructions. · f73c8a06
  Kyle Butt authored Jun 28, 2017
  f73c8a06
- [TableGen] Improve Debug Output for --debug-only=subtarget-emitter NFCI · 8037233b
  Joel Jones authored Jun 28, 2017
  8037233b
- Add missing library dependency. · 2d67e378
  Peter Collingbourne authored Jun 28, 2017
  2d67e378
- [COFF, ARM64] Add support for Windows ARM64 COFF format · 0c72172e
  Mandeep Singh Grang authored Jun 27, 2017
  0c72172e
- Object: Teach irsymtab::read() to try to use the irsymtab that we wrote to disk. · 99b98c21
  Peter Collingbourne authored Jun 27, 2017
  99b98c21
- Bitcode: Write the irsymtab to disk. · 92648c25
  Peter Collingbourne authored Jun 27, 2017
  92648c25
- Object: Add version and producer fields to the irsymtab header. NFCI. · 53ed867d
  Peter Collingbourne authored Jun 27, 2017
  53ed867d
- [CGP] add specialization for memcmp expansion with only one basic block · 4b23fa0a
  Sanjay Patel authored Jun 27, 2017
  4b23fa0a
- [NewPM/Inliner] Reduce threshold for cold callsites in the non-PGO case · c5fa6358
  Easwaran Raman authored Jun 27, 2017
  c5fa6358
- GlobalISel: add some more sanity-checking to MachineInstrBuilder. NFC. · c990236f
  Tim Northover authored Jun 27, 2017
  c990236f
- [AArch64] Inline callee if its target-features are a subset of the caller · 2665febb
  Florian Hahn authored Jun 27, 2017
  2665febb
- [EarlyCSE][MemorySSA] Enable MemorySSA in function-simplification pass of EarlyCSE. · 2573a19f
  Geoff Berry authored Jun 27, 2017
  2573a19f
- [Analysis] Revert r306472 changes in LoopInfo headers to fix broken builds. · 9dece191
  Eugene Zelenko authored Jun 27, 2017
  9dece191
- [GISel]: Add G_FEXP, G_FEXP2 opcodes · cca75d24
  Aditya Nandakumar authored Jun 27, 2017
  cca75d24
- clang-format a file. · 650c96e0
  Rafael Espindola authored Jun 27, 2017
  650c96e0
- re-commit r306336: Enable vectorizer-maximize-bandwidth by default. · 920d0225
  Dehao Chen authored Jun 27, 2017
  920d0225
Jun 27, 2017
- [Analysis] Fix some Clang-tidy modernize-use-using and Include What You Use... · 4f820d0e
  Eugene Zelenko authored Jun 27, 2017
  4f820d0e
- [CGP] eliminate a sub instruction in memcmp expansion · 70b36f19
  Sanjay Patel authored Jun 27, 2017
  70b36f19
- GlobalISel: verify that a COPY is trivial when created. · 849fcca0
  Tim Northover authored Jun 27, 2017
  849fcca0
- Clean up a test case · 241f0206
  Xinliang David Li authored Jun 27, 2017
  241f0206
- Create a PHI value when merging with a known undef live-in · 0b7688e6
  Krzysztof Parzyszek authored Jun 27, 2017
  0b7688e6
- [WebAssembly] Only run WebAssembly objdump tests if it is enabled as a target · 3431c3e9
  Sam Clegg authored Jun 27, 2017
  3431c3e9
- [AArch64] Performance enhancements for Cavium ThunderX2 T99 · aea1c356
  Joel Jones authored Jun 27, 2017
  aea1c356
- [WebAssembly] Add support for printing relocations with llvm-objdump · 4df5d764
  Sam Clegg authored Jun 27, 2017
  4df5d764
- [WebAssembly] Add data size and alignement to linking section · 9e1ade93
  Sam Clegg authored Jun 27, 2017
  9e1ade93
- [Hexagon] Use proper predicate register state when expanding PS_vselect · 25173e4c
  Krzysztof Parzyszek authored Jun 27, 2017
  25173e4c
- [InstCombine] Propagate nsw flag when turning mul by pow2 into shift when the... · 5fe01976
  Craig Topper authored Jun 27, 2017
  5fe01976
- [Constants] Fix copy-pasto in llvm_unreachable message. NFC · ccbb8107
  Craig Topper authored Jun 27, 2017
  ccbb8107
- [CGP] simplify code to get bswap in memcmp expansion; NFCI · 352e6055
  Sanjay Patel authored Jun 27, 2017
  352e6055
- [AMDGPU] Add 2 new alignbit patterns · e8bf6c96
  Stanislav Mekhanoshin authored Jun 27, 2017
  e8bf6c96
- [CodeExtractor] Prevent extraction of block involving blockaddress · 7bc405aa
  Serge Guelton authored Jun 27, 2017
  7bc405aa
- [AMDGPU] Simplify setcc (sext from i1 b), -1|0, cc · c9bd53ab
  Stanislav Mekhanoshin authored Jun 27, 2017
  c9bd53ab
- [Hexagon] Update kills in hexagon-nvj even more properly than before · 5ddd2e58
  Krzysztof Parzyszek authored Jun 27, 2017
  5ddd2e58
- RenameIndependentSubregs: Fix infinite loop · 836d786e
  Matt Arsenault authored Jun 27, 2017
  836d786e
- [SROA] Fix APInt size when alloca address space is not 0 · 7c44f340
  Yaxun Liu authored Jun 27, 2017
  7c44f340
- [AMDGPU] Combine and x, (sext cc from i1) => select cc, x, 0 · 6851ddf9
  Stanislav Mekhanoshin authored Jun 27, 2017
  6851ddf9