llvm-svn: 15652

llvm-svn: 15651

asmprintergeneration

llvm-svn: 15650

llvm-svn: 15648

llvm-svn: 15647

Start asmprintergen'ifying machine instrs with memory operands.

llvm-svn: 15646

llvm-svn: 15642

llvm-svn: 15636

llvm-svn: 15635

llvm-svn: 15634

llvm-svn: 15633

llvm-svn: 15631

* Wrap long line to 80 cols

llvm-svn: 15630

X86InstrInfo.td into 80 columns

llvm-svn: 15629

llvm-svn: 15628

Replace STDX (store 64 bit int indexed) with STFDX (store double indexed)
Fix latent bug in indexed load generation
Generate indexed loads and stores in many more cases

llvm-svn: 15626

llvm-svn: 15625

string operands, and adjusts all users to pass them in instead of using II.

llvm-svn: 15624

llvm-svn: 15621

llvm-svn: 15620

* Defined PHI instruction and SparcV9 subclass of Target

llvm-svn: 15615

llvm-svn: 15614

llvm-svn: 15613

llvm-svn: 15612

llvm-svn: 15606

llvm-svn: 15605

llvm-svn: 15604

Note that this indicates a serious problem with the way we are emitting varargs,
but this should not be properly fixed until after 1.3.

This patch SHOULD go into 1.3.

llvm-svn: 15602

llvm-svn: 15600

llvm-svn: 15599

llvm-svn: 15586

llvm-svn: 15583

llvm-svn: 15581

llvm-svn: 15580

that TableGen creates for them, e.g. CodeEmitter, AsmPrinter, etc.

llvm-svn: 15579

llvm-svn: 15578

llvm-svn: 15577

push onto the top of the stack like x86, which uses the local area
offset.  This will allow the removal of PowerPCPEI.cpp soon.

llvm-svn: 15573

llvm-svn: 15555

Changes commited for Nate Begeman:

Use a PowerPC specific prolog epilog inserter to control where spilled
callee save regs are placed on the stack.
Get rid of implicit return address stack slot, save return address reg
(LR) in appropriate slot
Improve code generated for functions that don't have calls or access
globals


Note from Chris: PowerPCPEI will eventually be eliminated, once the
functionality is merged into CodeGen/PrologEpilogInserter.cpp

llvm-svn: 15536