kind, and fix serialization/deserialization of IdentifierInfo
attributes. These are requires for the new 'availability' attribute.

llvm-svn: 128130

llvm-svn: 128020

code below it. Even though it looks very similar, it will match more precisely
and geneate better functions in the long run.

llvm-svn: 127991

This is a helper class that will make it easier to say which InstAliases can be
printed and which cannot (because of ambiguity).

llvm-svn: 127990

* Move the code that emits the reg in reg class matching into its own function.

llvm-svn: 127988

llvm-svn: 127888

nothing more than a bitcast.
- Teach tablegen to automatically infer "Bitcast" property.

llvm-svn: 127667

instruction set.  This code adds support for the VEX prefix
and for the YMM registers accessible on AVX-enabled
architectures.  Instruction table support that enables AVX
instructions for the disassembler is in an upcoming patch.

llvm-svn: 127644

llvm-svn: 127619

llvm-svn: 127592

llvm-svn: 127575

llvm-svn: 127517

llvm-svn: 127510

llvm-svn: 127509

llvm-svn: 127508

llvm-svn: 127506

llvm-svn: 127491

as for VDUP32d and VDUP32q, respectively.

llvm-svn: 127489

llvm-svn: 127488

and VDUPLN32d, respectively.

llvm-svn: 127486

as for VREV64d32 and VREV64q32, respectively.

llvm-svn: 127485

the diagnostic.

llvm-svn: 127480

CodeGenRegister entries. Use this information to more intelligently build
the literal register entires in the DAGISel matcher table. Specifically,
use a single-byte OPC_EmitRegister entry for registers with a value of
less than 256 and OPC_EmitRegister2 entry for registers with a larger value.

rdar://9066491

llvm-svn: 127456

llvm-svn: 127448

llvm-svn: 127447

llvm-svn: 127446

llvm-svn: 127445

llvm-svn: 127434

llvm-svn: 127419

expand the testing of the narrowing shift right instructions.

No functionality change.

llvm-svn: 127193

llvm-svn: 126931

Patch by Jyun-Yan You, with some minor adjustments and a testcase from me.

llvm-svn: 126915

Intended to be atomic with clang r126828.

llvm-svn: 126827

llvm-svn: 126733

llvm-svn: 126731

shift.

   16-bit: imm6<5:3> = '001', 8 - <imm> is encded in imm6<2:0>
   32-bit: imm6<5:4> = '01',16 - <imm> is encded in imm6<3:0>
   64-bit: imm6<5> = '1', 32 - <imm> is encded in imm6<4:0>

llvm-svn: 126723

   InstAlias<{alias}, {aliasee}>;

The InstAlias instruction should be able to go from the MCInst to the
{alias}. All of the information is there to match the MCInst with the
{aliasee}. From there, it's a simple matter to emit the {alias}, with the
correct operands from the {aliasee}.

The code this patch generates can be used by the InstPrinter to automatically
print out the alias without having to write special C++ code to handle the
situation.

This is a WIP, and therefore are several limitations. For instance, it cannot
handle AsmOperands at the moment. It also doesn't know what to do when two
{alias}es match the same {aliasee}. (Currently, it just ignores those two cases
and allows the printInstruction method to handle them.)

llvm-svn: 126538

llvm-svn: 126436

Patch by Jai Menon.

llvm-svn: 126165

Requires CMake 2.8.3 or newer.

llvm-svn: 126092