- Oct 09, 2012
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Bill Wendling authored
llvm-svn: 165458
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Nadav Rotem authored
llvm-svn: 165457
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Argyrios Kyrtzidis authored
of the initializer is valid before using it. Fixes rdar://12455002&12449015 where local variables of objc objects in ARC mode were not annotated because of the ImplicitValueInitExpr initializer having invalid source range, resulting in the SourceRange of the VarDecl having invalid end location. llvm-svn: 165456
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Nadav Rotem authored
Refactor the AddrMode class out of TLI to its own header file. This class is used by LSR and a number of places in the codegen. This is the first step in de-coupling LSR from TLI, and creating a new interface in between them. llvm-svn: 165455
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Greg Clayton authored
llvm-svn: 165441
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Chandler Carruth authored
seems to have intended. llvm-svn: 165440
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Chandler Carruth authored
functionality changed. llvm-svn: 165439
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Greg Clayton authored
Added a new "module" log channel which covers module creation, deletion, and common module list actions. Also added a new option for "log enable" which is "--stack" which will print out a stack backtrace for each log line. This was used to track down the leaking module issue I fixed last week. llvm-svn: 165438
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Greg Clayton authored
Checking in fixes that I used to track down a leaking module. The heap module can now search the vm regions with the --vm-regions options to any of the heap functions. This is currently slow and often will time out when run on a large program since our user expression timeout is set to 500000 usec. We need to add an API to LLDB where we can specify the timeout for an expression. llvm-svn: 165437
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Bill Wendling authored
attributes objects. llvm-svn: 165436
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Nick Lewycky authored
the same thing. No functionality change. llvm-svn: 165435
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Jakob Stoklund Olesen authored
When the CFG contains a loop with multiple entry blocks, the traces computed by MachineTraceMetrics don't always have the same nice properties. Loop back-edges are normally excluded from traces, but MachineLoopInfo doesn't recognize loops with multiple entry blocks, so those back-edges may be included. Avoid asserting when that happens by adding an isEarlierInSameTrace() function that accurately determines if a dominating block is part of the same trace AND is above the currrent block in the trace. llvm-svn: 165434
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- Oct 08, 2012
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Bill Wendling authored
Start using the AttributesImpl object to hold the value of the attributes. All queries go through the interfaces now. This has one unfortunate consequence. I needed to move the AttributesImpl.h file into include/llvm. But this is only temporary! Otherwise, the changes needed to support this would be too large. llvm-svn: 165433
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Eric Christopher authored
be emitted if they're wanted on elf platforms. llvm-svn: 165432
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Eric Christopher authored
llvm-svn: 165431
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Chandler Carruth authored
With this patch Bitrig can use a different c++ library without pain and within the normal commandline parameters. Original patch by David Hill, with lots of fixes and cleanup by me. llvm-svn: 165430
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Bill Wendling authored
llvm-svn: 165429
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Bill Wendling authored
llvm-svn: 165428
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Eric Christopher authored
llvm-svn: 165427
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Eric Christopher authored
llvm-svn: 165426
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Daniel Jasper authored
llvm-svn: 165425
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Daniel Jasper authored
considered absolute on all platforms. llvm-svn: 165422
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rdar://problem/12200505Enrico Granata authored
<rdar://problem/12200505> Fixing a logical error in SBProcess, where the get_process_thread_list function was creating invalid threads_access instances, and hence failing to correctly fill in the list llvm-svn: 165421
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Enrico Granata authored
Silly me! There was a closing ) missing from one of the lines - and Python complained about syntax errors on the next line. It being a Friday afternoon made the rest llvm-svn: 165420
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Adhemerval Zanella authored
Vector compare using altivec 'vcmpxxx' instructions have as third argument a vector register instead of CR one, different from integer and float-point compares. This leads to a failure in code generation, where 'SelectSETCC' expects a DAG with a CR register and gets vector register instead. This patch changes the behavior by just returning a DAG with the vector compare instruction based on the type. The patch also adds a testcase for all vector types llvm defines. It also included a fix on signed 5-bits predicates printing, where signed values were not handled correctly as signed (char are unsigned by default for PowerPC). This generates 'vspltisw' (vector splat) instruction with SIM out of range. llvm-svn: 165419
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Andrew Trick authored
llvm-svn: 165418
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Andrew Trick authored
llvm-svn: 165417
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Andrew Trick authored
llvm-svn: 165416
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Benjamin Kramer authored
PR14040. llvm-svn: 165415
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Daniel Jasper authored
llvm-svn: 165414
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Daniel Jasper authored
llvm-svn: 165412
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Adhemerval Zanella authored
llvm-svn: 165411
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Enrico Granata authored
llvm-svn: 165410
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Adhemerval Zanella authored
This patch add altivec support for v4i32 to v4f32 and for v4f32 to v4i32 vector rounding conversion. llvm-svn: 165409
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Micah Villmow authored
llvm-svn: 165408
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Micah Villmow authored
llvm-svn: 165406
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Micah Villmow authored
llvm-svn: 165404
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Micah Villmow authored
llvm-svn: 165403
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Micah Villmow authored
llvm-svn: 165402
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Micah Villmow authored
llvm-svn: 165401
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