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  1. Aug 06, 2010
  2. Jun 22, 2010
  3. Jun 19, 2010
    • Evan Cheng's avatar
      Allow ARM if-converter to be run after post allocation scheduling. · 2d51c7c5
      Evan Cheng authored
      - This fixed a number of bugs in if-converter, tail merging, and post-allocation
        scheduler. If-converter now runs branch folding / tail merging first to
        maximize if-conversion opportunities.
      - Also changed the t2IT instruction slightly. It now defines the ITSTATE
        register which is read by instructions in the IT block.
      - Added Thumb2 specific hazard recognizer to ensure the scheduler doesn't
        change the instruction ordering in the IT block (since IT mask has been
        finalized). It also ensures no other instructions can be scheduled between
        instructions in the IT block.
      
      This is not yet enabled.
      
      llvm-svn: 106344
      2d51c7c5
  4. Jun 18, 2010
    • Stuart Hastings's avatar
      Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This · 0125b641
      Stuart Hastings authored
      addresses a longstanding deficiency noted in many FIXMEs scattered
      across all the targets.
      
      This effectively moves the problem up one level, replacing eleven
      FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path
      through FastISel where we actually supply a DebugLoc, fixing Radar
      7421831.
      
      llvm-svn: 106243
      0125b641
  5. May 03, 2010
    • Dan Gohman's avatar
      Fix a bug which prevented tail merging of return instructions in · 2ad68de4
      Dan Gohman authored
      beneficial cases. See the changes in test/CodeGen/X86/tail-opts.ll and
      test/CodeGen/ARM/ifcvt2.ll for details.
      
      The fix is to change HashEndOfMBB to hash at most one instruction,
      instead of trying to apply heuristics about when it will be profitable to
      consider more than one instruction. The regular tail-merging heuristics
      are already prepared to handle the same cases, and they're more precise.
      
      Also, make test/CodeGen/ARM/ifcvt5.ll and
      test/CodeGen/Thumb2/thumb2-branch.ll slightly more complex so that they
      continue to test what they're intended to test.
      
      And, this eliminates the problem in
      test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll, the testcase from
      PR5204. Update it accordingly.
      
      llvm-svn: 102907
      2ad68de4
  6. Apr 02, 2010
  7. Mar 19, 2010
    • Bob Wilson's avatar
      Stop trying to merge identical jump tables. This had been inadvertently · bc5af98f
      Bob Wilson authored
      disabled for several months (since svn r88806) and no one noticed.  My fix
      for pr6543 yesterday reenabled it, but broke the ARM port's code for using
      TBB/TBH.  Rather than adding a target hook to disable merging for Thumb2 only,
      I'm just taking this out.  It is not common to have identical jump tables,
      the code we used to merge them was O(N^2), and it only helps code size, not
      performance.
      
      llvm-svn: 98977
      bc5af98f
  8. Mar 17, 2010
  9. Mar 14, 2010
  10. Mar 10, 2010
  11. Mar 08, 2010
  12. Mar 05, 2010
  13. Feb 09, 2010
  14. Jan 26, 2010
    • Chris Lattner's avatar
      Rearrange handling of jump tables. Highlights: · b6db2c6b
      Chris Lattner authored
      1. MachineJumpTableInfo is now created lazily for a function the first time
         it actually makes a jump table instead of for every function.
      2. The encoding of jump table entries is now described by the
         MachineJumpTableInfo::JTEntryKind enum.  This enum is determined by the
         TLI::getJumpTableEncoding() hook, instead of by lots of code scattered
         throughout the compiler that "knows" that jump table entries are always
         32-bits in pic mode (for example).
      3. The size and alignment of jump table entries is now calculated based on
         their kind, instead of at machinefunction creation time.
      
      Future work includes using the EntryKind in more places in the compiler,
      eliminating other logic that "knows" the layout of jump tables in various
      situations.
      
      llvm-svn: 94470
      b6db2c6b
  15. Dec 24, 2009
    • David Greene's avatar
      · d60abbf7
      David Greene authored
      Change errs() to dbgs().
      
      llvm-svn: 92097
      d60abbf7
  16. Dec 16, 2009
  17. Dec 15, 2009
  18. Dec 11, 2009
    • Bill Wendling's avatar
      Don't try to move a MBB into the fall-through position if it's a landing pad or · b87b9925
      Bill Wendling authored
      branches only to a landing pad. Without this check, the compiler would go into
      an infinite loop because the branch to a landing pad is an "abnormal" edge which
      wasn't being taken into account.
      
      This is the meat of that fix:
      
        if (!PrevBB.canFallThrough() && !MBB->BranchesToLandingPad(MBB)) {
      
      The other stuff is simplification of the "branches to a landing pad" code.
      
      llvm-svn: 91161
      b87b9925
  19. Dec 05, 2009
  20. Dec 03, 2009
  21. Nov 26, 2009
    • Bob Wilson's avatar
      Split tail duplication into a separate pass. This is needed to avoid · 2d4ff12d
      Bob Wilson authored
      running tail duplication when doing branch folding for if-conversion, and
      we also want to be able to run tail duplication earlier to fix some
      reg alloc problems.  Move the CanFallThrough function from BranchFolding
      to MachineBasicBlock so that it can be shared by TailDuplication.
      
      llvm-svn: 89904
      2d4ff12d
  22. Nov 25, 2009
    • Bob Wilson's avatar
      Refactor target hook for tail duplication as requested by Chris. · d4d40670
      Bob Wilson authored
      Make tail duplication of indirect branches much more aggressive (for targets
      that indicate that it is profitable), based on further experience with
      this transformation.  I compiled 3 large applications with and without
      this more aggressive tail duplication and measured minimal changes in code
      size.  ("size" on Darwin seems to round the text size up to the nearest
      page boundary, so I can only say that any code size increase was less than
      one 4k page.) Radar 7421267.
      
      llvm-svn: 89814
      d4d40670
  23. Nov 19, 2009
  24. Nov 18, 2009
  25. Nov 17, 2009
  26. Nov 16, 2009
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