when they move instructions.

llvm-svn: 103737

use of it in MachineCSE.

llvm-svn: 103726

basic block.

llvm-svn: 103725

This causes way more identity copies to be generated, ripe for coalescing.

llvm-svn: 103686

llvm-svn: 103685

If REG_SEQUENCE source is livein, copy it first. Also, update livevariables information when a copy is introduced.

llvm-svn: 103680

llvm-svn: 103679

The X86 floating point stack pass and others depend on good kill flags.

llvm-svn: 103635

llvm-svn: 103586

Now, the .linkonce directive is emitted as part of MCSectionCOFF::PrintSwitchToSection instead of AsmPrinter::EmitLinkage since it is an attribute of the section the symbol was placed into not the symbol itself.

llvm-svn: 103568

llvm-svn: 103539

llvm-svn: 103538

llvm-svn: 103530

llvm-svn: 103529

llvm-svn: 103528

llvm-svn: 103522

This allows us to add accurate kill markers, something the scavenger likes.
Add some more tests from ARM that needed this.

llvm-svn: 103521

create separate virtual registers for CopyFromReg values, so uses of
them don't necessarily kill the value.

llvm-svn: 103519

llvm-svn: 103508

closure after allocating all blocks.

Add a few more test cases for -regalloc=fast.

llvm-svn: 103500

to LLVM_LIBRARY_VISIBILITY and introduce LLVM_GLOBAL_VISIBILITY, which is
the opposite, for future use by dragonegg.

llvm-svn: 103495

llvm-svn: 103489

Sorry for the big change. The path leading up to this patch had some TableGen
changes that I didn't want to commit before I knew they were useful. They
weren't, and this version does not need them.

The fast register allocator now does no liveness calculations. Instead it relies
on kill flags provided by isel. (Currently those kill flags are also ignored due
to isel bugs). The allocation algorithm is supposed to work with any subset of
valid kill flags. More kill flags simply means fewer spills inserted.

Registers are allocated from a working set that contains no aliases. That means
most allocations can be done directly without expensive alias checks. When the
working set runs out of registers we do the full alias check to find new free
registers.

llvm-svn: 103488

Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and
EmitTargetCodeForMemmove out of TargetLowering and into
SelectionDAGInfo to exercise this.

llvm-svn: 103481

llvm-svn: 103457

llvm-svn: 103450

llvm-svn: 103449

llvm-svn: 103441

This means now 'llvm-ld a.bc b.bc' will preserve debug info appropriately.

llvm-svn: 103439

llvm-svn: 103436

llvm-svn: 103435

Be careful with operand promotion. For a binary operation, the source operands may be the same. PR7018. rdar://7939869.

llvm-svn: 103419

llvm-svn: 103410

SSAUpdater for the value from the first def may see uses of undefined values,
because the later defs will not have been updated yet.

llvm-svn: 103407

Based on a patch by Javier Martinez.

llvm-svn: 103391

llvm-svn: 103327

llvm-svn: 103325

and not the real problem itself, by dropping debug info for i128 values.
rdar://7958162.

llvm-svn: 103310

llvm-svn: 103305

llvm-svn: 103304