- Jun 27, 2009
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Chris Lattner authored
by Evan. llvm-svn: 74370
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Evan Cheng authored
llvm-svn: 74368
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Chris Lattner authored
llvm-svn: 74366
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Chris Lattner authored
llvm-svn: 74364
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David Goodwin authored
llvm-svn: 74357
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David Goodwin authored
When possible, use "mvn ra, rb" instead of "eor ra, rb, -1" because mvn has a narrow version and eor(i) does not. llvm-svn: 74355
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Dan Gohman authored
This helps it avoid reusing an instruction that doesn't dominate all of the users, in cases where the original instruction was inserted before all of the users were known. This may result in redundant expansions of sub-expressions that depend on loop-unpredictable values in some cases, however this isn't very common, and it primarily impacts IndVarSimplify, so GVN can be expected to clean these up. This eliminates the need for IndVarSimplify's FixUsesBeforeDefs, which fixes several bugs. llvm-svn: 74352
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Devang Patel authored
llvm-svn: 74351
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David Greene authored
Add feature flags for AVX and FMA and fix some SSE4A feature flag initialization problems. llvm-svn: 74350
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Dan Gohman authored
nesting order of nested AddRec expressions to skip the transformation if it would introduce an AddRec with operands not loop-invariant with respect to its loop. llvm-svn: 74343
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Dan Gohman authored
are loop invariant, not just the start operand. llvm-svn: 74338
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Evan Cheng authored
Add x86 support for 'n' inline asm modifier. This will be handled target independently as part of MC work. llvm-svn: 74336
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- Jun 26, 2009
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Chris Lattner authored
llvm-svn: 74334
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Owen Anderson authored
llvm-svn: 74332
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Owen Anderson authored
llvm-svn: 74330
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Anton Korobeynikov authored
Step 1: ARMInstructionInfo => {ARM,Thumb}InstructionInfo llvm-svn: 74329
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Chris Lattner authored
llvm-svn: 74328
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Chris Lattner authored
llvm-svn: 74327
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Chris Lattner authored
llvm-svn: 74326
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Chris Lattner authored
the SelectionDAG::getGlobalAddress function properly looks through aliases to determine thread-localness, but then passes the GV* down to GlobalAddressSDNode::GlobalAddressSDNode which does not. Instead of passing down isTarget, just pass down the predetermined node opcode. This fixes some assertions with out of tree changes I'm working on. llvm-svn: 74325
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David Goodwin authored
llvm-svn: 74322
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David Goodwin authored
llvm-svn: 74321
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Owen Anderson authored
we had multiple type planes and these lookups were expensive. llvm-svn: 74319
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Owen Anderson authored
llvm-svn: 74317
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Chris Lattner authored
llvm-svn: 74316
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Owen Anderson authored
llvm-svn: 74315
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Chris Lattner authored
llvm-svn: 74313
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Chris Lattner authored
SDNode::print_details to eliminate a ton of near-duplicate code. llvm-svn: 74311
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Chris Lattner authored
llvm-svn: 74310
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Owen Anderson authored
llvm-svn: 74294
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David Goodwin authored
llvm-svn: 74293
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Owen Anderson authored
llvm-svn: 74291
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David Goodwin authored
Currently there is a pattern for the thumb-2 MOV 16-bit immediate instruction. That instruction cannot write the flags so it should use T2I instead of T2sI. Also, added a pattern for the thumb-2 MOV of shifted immediate since that can encode immediates not encodable by the 16-bit immediate. llvm-svn: 74288
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Douglas Gregor authored
llvm-svn: 74285
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Owen Anderson authored
Patch by Xerxes Ranby. llvm-svn: 74283
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Evan Cheng authored
llvm-svn: 74277
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Chris Lattner authored
llvm-svn: 74275
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Chris Lattner authored
but in the meantime lets print targetflags on node labels. llvm-svn: 74274
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Chris Lattner authored
llvm-svn: 74273
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Chris Lattner authored
llvm-svn: 74272
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