relevant subclasses of RuntimeDyldImpl. This allows construction of
RuntimeDyldImpl instances to be deferred until after the target architecture is
known.

llvm-svn: 203352

llvm-svn: 203347

llvm-svn: 203344

llvm-svn: 203342

De-virtualize a method since it doesn't override anything (yay 'override' keyword) and its class is in an anonymous namespace.

llvm-svn: 203341

llvm-svn: 203340

llvm-svn: 203339

Suggested by Adrian Prantl in code review for r203187

llvm-svn: 203323

Add a testcase based on sret.cpp where we can now hash the entire
compile unit.

llvm-svn: 203319

This is already done for shifts.  Allow it for rotations as well. E.g.:

   (rotl:i32 x, (trunc (and y, 31))) -> (rotl:i32 x, (and (trunc y), 31))

Use the newly factored-out distributeTruncateThroughAnd.

With this patch and some X86.td tweaks we should be able to remove redundant
masking of the rotation amount like in the example above.  HW implicitly
performs this masking.

The testcase will be added as part of the X86 patch.

llvm-svn: 203316

This is the new idiom:

  x<<(y&31) | x>>((0-y)&31)

which is recognized as:

  x ROTL (y&31)

The change refines matchRotateSub.  In
Neg & (OpSize - 1) == (OpSize - Pos) & (OpSize - 1), if Pos is
Pos' & (OpSize - 1) we can just use Pos' instead of Pos.

llvm-svn: 203315

Slightly change the wording in the function comment. Originally, it can be
misunderstood as we turned the input into two subsequent rotates.

Better connect the comment which talks about Mask and the code which used
LoBits.  Renamed variable to MaskLoBits.

llvm-svn: 203314

be split and the result type widened.

When the condition of a vselect has to be split it makes no sense widening the
vselect and thereby widening the condition. We end up in an endless loop of
widening (vselect result type) and splitting (condition mask type) doing this.
Instead, split both the condition and the vselect and widen the result.

I ran this over the test suite with i686 and mattr=+sse and saw no regressions.

Fixes PR18036.

llvm-svn: 203311

horrible/fragile.
rdar://problem/16264854

llvm-svn: 203309

llvm-svn: 203307

llvm-svn: 203306

llvm-svn: 203305

First: refactor out the emission of entries into the .debug_loc section
into its own routine.

Second: add a new class ByteStreamer that can be used to either emit
using an AsmPrinter or hash using DIEHash the series of bytes that
would be emitted. Use this in all of the location emission routines
for the .debug_loc section.

No functional change intended outside of a few additional comments
in verbose assembly.

llvm-svn: 203304

to the hash.

llvm-svn: 203303

llvm-svn: 203301

This breaks linux buildbots. Go figure.

llvm-svn: 203300

llvm-svn: 203297

Suggested by Adrian Prantl in code review for r203187.

llvm-svn: 203296

Looks like GCC implements the lambda->function pointer conversion differently.

llvm-svn: 203294

No functionality change.

llvm-svn: 203288

llvm-svn: 203286

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
llvm-svn: 203281

These are sometimes created by the shrink to boolean optimization in the
globalopt pass.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
llvm-svn: 203280

No functionality change.

llvm-svn: 203276

It has a lot of them with complex types. C++11 really shines here.

llvm-svn: 203270

The integrated assembler now works for ppc. Since this was the last use of the
bg/p predicate and Hal says that it is now dead, drop the predicate too.

llvm-svn: 203269

llvm-svn: 203267

llvm-svn: 203265

This is a straightfoward replacement, it makes debugging a little
easier.

This has no functional impact.

llvm-svn: 203264

For incoming improvements to inlined functions and lexical blocks
suggested by Adrian Prantl in review of r203187.

llvm-svn: 203263

Patch from Sean McBride <sean@rogue-research.com>!

llvm-svn: 203258

Code review feedback to r203187 from Oliver Stannard. Thanks!

llvm-svn: 203256

Be case-insensitive when processing .unreq directives.

Patch by Lin Zuojian!

llvm-svn: 203251

The target was marking SIGN_EXTEND as Custom because it wanted to optimize
certain sign-extended shifts.  In all other respects the extension is Legal,
so it'd be better to do the optimization in PerformDAGCombine instead.

No functional change intended.

llvm-svn: 203234

This helps the instruction selector to lower an i64 * i64 -> i128
multiplication into a single instruction on targets which support it.

Patch by Manuel Jacob.

llvm-svn: 203230