Commits · c9f727bb85bbff4bf6f112e9887595e9928f4261 · Roger Ferrer / llvm-epi-0.8 · GitLab

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Jun 13, 2018
- [llvm-exegesis] Cleaner design without mutable data. · c9f727bb
  Guillaume Chatelet authored Jun 13, 2018
  c9f727bb
- [mips][microMIPS] Extending size reduction pass with LWP and SWP · 3a7654c1
  Zoran Jovanovic authored Jun 13, 2018
  3a7654c1
- Improve handling of COPY instructions with identical value numbers · 36b816f8
  Krzysztof Parzyszek authored Jun 13, 2018
  36b816f8
- [x86] eliminate even more sign-bit tests with vector select · b983ac6f
  Sanjay Patel authored Jun 13, 2018
  b983ac6f
- [RISCV] Add codegen support for atomic load/stores with RV32A · 96f492d7
  Alex Bradbury authored Jun 13, 2018
  96f492d7
- [RISCV] Codegen support for atomic operations on RV32I · dc790dd5
  Alex Bradbury authored Jun 13, 2018
  dc790dd5
- [SLPVectorizer] getSameOpcode - remove useless cast [NFC] · 2c9d2adf
  Simon Pilgrim authored Jun 13, 2018
  2c9d2adf
- [SLPVectorizer] getSameOpcode - remove unusued alternate code [NFC] · 1224260f
  Simon Pilgrim authored Jun 13, 2018
  1224260f
- [TableGen] Emit a fatal error on inconsistencies in resource units vs cycles. · 5eeed77f
  Clement Courbet authored Jun 13, 2018
  5eeed77f
- GettingStarted.rst: Fix 'If you you' typo (PR37787) · 005dd846
  Hans Wennborg authored Jun 13, 2018
  005dd846
- [PowerPC] fix trivial typos in comment, NFC · 0f7f59f0
  Hiroshi Inoue authored Jun 13, 2018
  0f7f59f0
- Fix -DLLVM_ENABLE_THREADS=OFF build after r334537 · 32e611d1
  Hans Wennborg authored Jun 13, 2018
  32e611d1
- Fix "Optional" is ambiguous error on some bots · 4b896eb7
  Pavel Labath authored Jun 13, 2018
  4b896eb7
- [PowerPC] avoid verification failure due to PowerPC VSX Swap Removal pass · 9bffc94c
  Hiroshi Inoue authored Jun 13, 2018
  9bffc94c
- [DWARF/AccelTable] Remove getDIESectionOffset for DWARF v5 entries · 4adc88ed
  Pavel Labath authored Jun 13, 2018
  4adc88ed
- [X86] Remove masking from avx512vbmi2 concat and shift by immediate... · 3829d258
  Craig Topper authored Jun 13, 2018
  3829d258
- Set the code model when specified. · 206afca5
  Bill Wendling authored Jun 13, 2018
  206afca5
- utils/release: Add merge-git.sh · 4ee4eb7c
  Tom Stellard authored Jun 13, 2018
  4ee4eb7c
- [SimplifyIndVars] Ignore dead users · 0ed79620
  Max Kazantsev authored Jun 13, 2018
  0ed79620
- Revert "Fix how LLVMOPTIONALCOMPONENTS is passed to llvm-build" · 8472ec96
  Ahmed Bougacha authored Jun 13, 2018
  8472ec96
- [X86] Mark all instructions that have masked store semantics with... · 55488731
  Craig Topper authored Jun 13, 2018
  55488731
- [X86] Remove VPCOMPRESSB/W from the autogenerated load folding table. · 4f9cac66
  Craig Topper authored Jun 13, 2018
  4f9cac66
- [AMDGPU] DAG combine to produce V_PERM_B32 · 8fd3c4e4
  Stanislav Mekhanoshin authored Jun 12, 2018
  8fd3c4e4
- [AArch64] add tests for fadd with more than one use; NFC · 82bc8426
  Sanjay Patel authored Jun 12, 2018
  82bc8426
- Added missing include to AMDHSAKernelDescriptor.h · 7d1d180e
  Raphael Isemann authored Jun 12, 2018
  7d1d180e
Jun 12, 2018
- [DAGCombiner] Recognize more patterns for ABS · 82d284c1
  Krzysztof Parzyszek authored Jun 12, 2018
  82d284c1
- [X86] add avx512 tests for potentially miscompiling cvttp2si/cvttp2ui (PR37751). · 651ef359
  Craig Topper authored Jun 12, 2018
  651ef359
- Remove malloc.h include from Intel JIT events code · 04920989
  Reid Kleckner authored Jun 12, 2018
  04920989
- Add null check to Intel JIT event listener · 722e2ea2
  Reid Kleckner authored Jun 12, 2018
  722e2ea2
- Fix how LLVMOPTIONALCOMPONENTS is passed to llvm-build · 8e42bfd4
  Reid Kleckner authored Jun 12, 2018
  8e42bfd4
- [ORC] Add a fallback definition generator for VSOs. · 2aae2581
  Lang Hames authored Jun 12, 2018
  2aae2581
- [ORC] Refactor blocking lookup logic into the blockingLookup function, and · 253584fd
  Lang Hames authored Jun 12, 2018
  253584fd
- [RuntimeDyld] Add an assert to catch misbehaving symbol resolvers. · 22a74402
  Lang Hames authored Jun 12, 2018
  22a74402
- [MCJIT] Call materializeAll on modules before compiling them in MCJIT. · e7989ef4
  Lang Hames authored Jun 12, 2018
  e7989ef4
- [AArch64] Support reserving x20 register · 72509080
  Petr Hosek authored Jun 12, 2018
  72509080
- [X86] Remove unnecessary include from one of the tblgen emitters. · 6d0d812d
  Craig Topper authored Jun 12, 2018
  6d0d812d
- [X86] Remove mayLoad flag from AVX512 truncating store instructions. · 3a34c359
  Craig Topper authored Jun 12, 2018
  3a34c359
- [MS][ARM64] Hoist __ImageBase handling into TargetLoweringObjectFileCOFF · 98117a47
  Reid Kleckner authored Jun 12, 2018
  98117a47
- AMDHSA/NFC: Code object v3 updates (additional): · ce25bc3e
  Konstantin Zhuravlyov authored Jun 12, 2018
  ce25bc3e
- [MIR][MachineCSE] Implementing proper MachineInstr::getNumExplicitDefs() · b2d3f2e5
  Roman Tereshin authored Jun 12, 2018
  b2d3f2e5