llvm-svn: 115089

Generalize DISubprogram element to encode various flags instead of just one boolean for isArtificial.
This is a backword compatible change.

llvm-svn: 115084

UnreachableBlockElim could incorrectly return false when it had not modified the CFG, but HAD modified some PHI nodes.  Fixes PR8174.

llvm-svn: 115083

Fix PR8247: JumpThreading can cause a block to become unreachable while still having predecessor, if it is part of a self-loop.
Because of this, we cannot use the Simplify* APIs, as they can assert-fail on unreachable code.  Since it's not easy to determine
if a given threading will cause a block to become unreachable, simply defer simplifying simplification to later InstCombine and/or
DCE passes.

llvm-svn: 115082

llvm-svn: 115076

llvm-svn: 115067

which require the use of the shifter-operand. This will be used to split
the ldr/str instructions such that those versions needing the shifter operand
can get a different scheduling itenerary, as in some cases, the use of the
shifter can cause different scheduling than the simpler forms.

llvm-svn: 115066

  lib/Target/X86/X86MCCodeEmitter.cpp: 190: error: suggest parentheses around '&&' within '||'

llvm-svn: 115064

for LLVM 2.9

llvm-svn: 115062

llvm-svn: 115061

llvm-svn: 115053

LDM/STM instructions can run one cycle faster on some ARM processors if the
memory address is 64-bit aligned.  Radar 8489376.

llvm-svn: 115047

llvm-svn: 115043

One Printer to lower them all and in the back end bind them.


(Remove option to use the old non-MC asm printer.)

llvm-svn: 115038

llvm-svn: 115037

added some doxygen on the way

llvm-svn: 115033

llvm-svn: 115029

llvm-svn: 115027

order as cctools for diffability.

llvm-svn: 115022

are defined to emit the 0x67 prefix byte.  rdar://8482675

llvm-svn: 115021

llvm-svn: 115020

operands.

With this done, we can remove the _Int suffixes from the round instructions
without the disassembler blowing up.  This allows the assembler to support
them, implementing rdar://8456376 - llvm-mc rejects 'roundss'

llvm-svn: 115019

Clean up cvttps2dq by removing some redundant implementations of the
same instruction.  rdar://8456382

llvm-svn: 115018

llvm-svn: 115017

an instruction that requires a WHOLE NEW wonderful kind of alias.

llvm-svn: 115015

MCStreamer to emit into instead of an MCInst to fill in.  This allows the
matcher extra flexibility and is more convenient.

llvm-svn: 115014

problems with phi-nodes in blocks that have hard and not virtual registers.

Accordingly update branch handling to compensate.

llvm-svn: 115013

llvm-svn: 115011

llvm-svn: 115010

llvm-svn: 115009

Assign bitwise binary instructions different itinerary classes from ALU instructions such as add / sub.

llvm-svn: 115008

llvm-svn: 115005

llvm-svn: 115002

llvm-svn: 115001

llvm-svn: 114999

knows about them. This is not necessary on 10.6 and later.

llvm-svn: 114997

delete the MDNode that changed, rather than the other MDNode.
This is less work, because it doesn't require the changed node
to be re-inserted into the uniquing map and it doesn't require
the is-function-local flag to be recomputed. Also, it avoids
trouble when the existing node is part of a complicated
data structure.

llvm-svn: 114996

cost modeling for if-conversion.  Now if only we had a way to estimate the misprediction probability.

Adjsut CodeGen/ARM/ifcvt10.ll.  The pipeline on Cortex-A8 is long enough that it is still profitable
to predicate an ldm, but the shorter pipeline on Cortex-A9 makes it unprofitable.

llvm-svn: 114995

llvm-svn: 114994

  ARMTargetMachine.cpp:53: error: control reaches end of non-void function

llvm-svn: 114992