- May 28, 2013
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Jyotsna Verma authored
llvm-svn: 182790
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Chad Rosier authored
The size reduction in the RegDiffLists are rather dramatic. Here are a few size differences for MCTargetDesc.o files (before and after) in bytes: R600 - 36160B - 11184B - 69% reduction ARM - 28480B - 8368B - 71% reduction Mips - 816B - 576B - 29% reduction One side effect of dynamically computing the aliases is that the iterator does not guarantee that the entries are ordered or that duplicates have been removed. The documentation implies this is a safe assumption and I found no clients that requires these attributes (i.e., strict ordering and uniqueness). My local LNT tester results showed no execution-time failures or significant compile-time regressions (i.e., beyond what I would consider noise) for -O0g, -O2 and -O3 runs on x86_64 and i386 configurations. rdar://12906217 llvm-svn: 182783
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Benjamin Kramer authored
llvm-svn: 182779
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Benjamin Kramer authored
llvm-svn: 182778
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James Molloy authored
Extend LinkModules to pass a ValueMaterializer to RemapInstruction and friends to lazily create Functions for lazily linked globals. This is a big win when linking small modules with large (mostly unused) library modules. llvm-svn: 182776
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Evgeniy Stepanov authored
llvm-svn: 182771
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Renato Golin authored
llvm-svn: 182766
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Richard Sandiford authored
This patch adds support for the CRJ and CGRJ instructions. Support for the immediate forms will be a separate patch. The architecture has a large number of comparison instructions. I think it's generally better to concentrate on using the "best" comparison instruction first and foremost, then only use something like CRJ if CR really was the natual choice of comparison instruction. The patch therefore opportunistically converts separate CR and BRC instructions into a single CRJ while emitting instructions in ISelLowering. llvm-svn: 182764
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Renato Golin authored
llvm-svn: 182763
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Richard Sandiford authored
This is needed for the upcoming compare-and-branch patch. No functional change intended. llvm-svn: 182762
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Alexey Samsonov authored
llvm-svn: 182761
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Renato Golin authored
llvm-svn: 182759
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Alexey Samsonov authored
llvm-svn: 182758
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Michael Kuperstein authored
Make BasicAliasAnalysis recognize the fact a noalias argument cannot alias another argument, even if the other argument is not itself marked noalias. llvm-svn: 182755
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Rafael Espindola authored
No functionality change. llvm-svn: 182747
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Rafael Espindola authored
And remove header and cpp file that are empty after that. llvm-svn: 182746
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- May 27, 2013
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Preston Gurd authored
When -ffast-math is in effect (on Linux, at least), clang defines __FINITE_MATH_ONLY__ > 0 when including <math.h>. This causes the preprocessor to include <bits/math-finite.h>, which renames the sqrt functions. For instance, "sqrt" is renamed as "__sqrt_finite". This patch adds the 3 new names in such a way that they will be treated as equivalent to their respective original names. llvm-svn: 182739
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Rafael Espindola authored
llvm-svn: 182734
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Hal Finkel authored
isConsecutiveLS is a slightly more general form of SelectionDAG::isConsecutiveLoad. Aside from also handling stores, it also does not assume equality of the chain operands is necessary. In the case of the PPC backend, this chain condition is checked in a more general way by the surrounding code. Mostly, this part of the refactoring in preparation for supporting optimized unaligned stores. llvm-svn: 182723
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NAKAMURA Takumi authored
llvm-svn: 182722
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- May 26, 2013
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Hal Finkel authored
When expanding unaligned Altivec loads, we use the decremented offset trick to prevent page faults. Unfortunately, if we have a sequence of consecutive unaligned loads, this leads to suboptimal code generation because the 'extra' load from the first unaligned load can be combined with the base load from the second (but only if the decremented offset trick is not used for the first). Search up and down the chain, through loads and token factors, looking for consecutive loads, and if one is found, don't use the offset reduction trick. These duplicate loads are later combined to yield the desired sequence (in the future, we might want a more-powerful chain search, but that will require some changes to allow the combiner routines to access the AA object). This should complete the initial implementation of the optimized unaligned Altivec load expansion. There is some refactoring that should be done, but that will happen when the unaligned store expansion is added. llvm-svn: 182719
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Kai Nacke authored
llvm-svn: 182718
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Andrew Trick authored
llvm-svn: 182717
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Galina Kistanova authored
llvm-svn: 182715
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Chris Lattner authored
reject things like: "for (auto Entry : SomeStringMap)". Previously this would copy the value but not the tail allocated string data (the key). llvm-svn: 182713
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- May 25, 2013
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Cameron Zwarich authored
stream. llvm-svn: 182712
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Eric Christopher authored
llvm-svn: 182710
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Hal Finkel authored
The lvsl permutation control instruction is a function only of the alignment of the pointer operand (relative to the 16-byte natural alignment of Altivec vectors). As a result, multiple lvsl intrinsics where the operands differ by a multiple of 16 can be combined. llvm-svn: 182708
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Andrew Trick authored
Unit test cases for -pre-RA-sched=source. llvm-svn: 182706
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Andrew Trick authored
Remove the old IR ordering mechanism and switch to new one. Fix unit test failures. llvm-svn: 182704
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Andrew Trick authored
Change SelectionDAG::getXXXNode() interfaces as well as call sites of these functions to pass in SDLoc instead of DebugLoc. llvm-svn: 182703
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Andrew Trick authored
Use a field in the SelectionDAGNode object to track its IR ordering. This adds fields and utility classes without changing existing interfaces or functionality. llvm-svn: 182701
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Andrew Trick authored
llvm-svn: 182700
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Eric Christopher authored
llvm-svn: 182693
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Eric Christopher authored
Add a stringize method to make dumping a bit easier, and add a testcase exercising a few different paths. llvm-svn: 182692
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Hal Finkel authored
Altivec only directly supports aligned loads, but the loads have a strange property: If given an unaligned address, they truncate the address to the next lower aligned address, and load from there. This property, along with an extra load and some special-purpose permutation-control instructions that generate the appropriate permutations from the original unaligned address, allow efficient lowering of aligned loads. This code uses the trick explained in the Apple Velocity Engine optimization overview document to prevent the needed extra load from possibly causing a page fault if the original address happens to be aligned. As noted in the FIXMEs, there are several additional optimizations that can be performed to reduce the cost of these loads even more. These will be implemented in future commits. llvm-svn: 182691
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Michael J. Spencer authored
llvm-svn: 182690
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Jim Grosbach authored
llvm-svn: 182689
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Quentin Colombet authored
- Ressurect old MCDisassemble API to soften transition. - Extend MCTargetDesc to set target specific symbolizer. llvm-svn: 182688
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Michael Gottesman authored
llvm-svn: 182686
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