llvm-svn: 108277

NEON VMOV-immediate instructions.  This simplifies some things.

llvm-svn: 108275

Add the x86 VEX_L form to handle special cases where VEX_L must be set.

llvm-svn: 108274

This may not be right in all cases, but it's better
than asserting which it was doing before.  PR 7528.

llvm-svn: 108268

llvm-svn: 108265

LiveInterval::overlapsFrom dereferences end() if it is called on an empty
interval.

It would be reasonable to just return false - an empty interval doesn't overlap
anything, but I want to know who is doing it first.

llvm-svn: 108264

useful, but it is nice for consistency.

llvm-svn: 108262

Also, one binary search is enough.

llvm-svn: 108261

llvm-svn: 108259

Extend the r107852 optimization which turns some fp compare to code sequence using only i32 operations. It now optimize some f64 compares when fp compare is exceptionally slow (e.g. cortex-a8). It also catches comparison against 0.0.

llvm-svn: 108258

llvm-svn: 108256

llvm-svn: 108254

llvm-svn: 108252

by a return that returns a constant, while elsewhere in the function
another return instruction returns a different constant.  This is a
special case of accumulator recursion, so just generalize the existing
logic a bit.

llvm-svn: 108241

with this commit the callee moves to the end of
the operand array (from the start) and the call
arguments now start at index 0 (formerly 1)

this ordering is now consistent with InvokeInst

this commit only flips the switch,
functionally it is equivalent to
r101465

I intend to commit several cleanups after a few
days of soak period

llvm-svn: 108240

avoid replicated code.

llvm-svn: 108227

disassembler.  Remove some code from the disassembler to
compensate, unbreaking disassembly of lea's.

llvm-svn: 108226

llvm-svn: 108224

llvm-svn: 108223

llvm-svn: 108222

they already have one.

This fixes the himenobmtxpa miscompilation on ARM.

The PostRA scheduler got confused by the double memoperand and hoisted a stack
slot load above a store to the same slot.

llvm-svn: 108219

Move some SIMD fragment code into X86InstrFragmentsSIMD so that the
utility classes can be used from multiple files.  This will aid
transitioning to a new refactored x86 SIMD specification.

llvm-svn: 108213

llvm-svn: 108207

llvm-svn: 108204

llvm-svn: 108196

llvm-svn: 108193

SD instructions too, in addition to SS instructions. And
add a comment about it.

llvm-svn: 108191

llvm-svn: 108190

llvm-svn: 108187

instructions already have implicit defs of LR.  The comment suggests that
this is intended to fix something like pr6111, but it doesn't really do
that either.

llvm-svn: 108186

llvm-svn: 108185

llvm-svn: 108184

llvm-svn: 108183

llvm-svn: 108180

llvm-svn: 108179

llvm-svn: 108176

llvm-svn: 108174

llvm-svn: 108167

 - Currently initialization is a bit of a hack, but harmless. We need to rework
   various parts of target initialization to clean this up.

llvm-svn: 108165

llvm-svn: 108164