are represented as "weak", but there are subtle differences
in some cases on Darwin, so we need both.  The intent
is that "common" will behave identically to "weak" unless
somebody changes their target to do something else.
No functional change as yet.

llvm-svn: 51118

llvm-svn: 51115

Patch by Matthijs Kooijman!

llvm-svn: 51114

SETOEQ, is it does with (SETEQ & SETULE), map it to SETEQ.

llvm-svn: 51112

Changed cout to DOUT, and TODOs to FIXMEs.
Other changes as per coding conventions.

llvm-svn: 51105

to make the Cpp backend output compilable.

llvm-svn: 51095

llvm-svn: 51094

llvm-svn: 51092

This eliminates the need for several awkward casts, including
the last dynamic_cast under lib/Target.

llvm-svn: 51091

llvm-svn: 51089

llvm-svn: 51088

Patch by Matthijs Kooijman!

llvm-svn: 51083

bug as well as a missed optimization.  We weren't properly checking for local
dependencies before moving on to non-local ones when doing non-local read-only 
call CSE.

llvm-svn: 51082

Do not rely on std::swap<Use>, provide a (faster) member function instead.
This change is primarily necessitated by MSVC++'s incompatibility with
declaring std::swap<Use> to be a friend of Use.

Also contains some minor tweaks to Use inline functions,
to undo pointless changes that sneaked in with the last merge.

llvm-svn: 51078

llvm-svn: 51075

instruction.  This fixes some Ada miscompiles reported in PR2324.

llvm-svn: 51069

llvm-svn: 51063

llvm-svn: 51062

- Incorporate Chris' comment suggestion.

llvm-svn: 51061

llvm-svn: 51060

llvm-svn: 51057

- Correct a pasto.

llvm-svn: 51054

llvm-svn: 51035

A brief description about PIC16:
===============================
PIC16 is an 8-bit microcontroller with only one 8-bit register which is the 
accumulator. All arithmetic/load/store operations are 8-bit only.
The architecture has two address spaces: program and data. The program memory 
is divided into 2K pages and the data memory is divided into banks of 128 byte, with only 80 usable bytes, resulting in an non-contiguous data memory. 

It supports direct data memory access (by specifying the address as part of the instruction) and indirect data and program memory access (in an unorthodox fashion which utilize a 16 bit pointer register). 

Two classes of registers exist: (8-bit class which is only one
accumulator) (16-bit class, which contains one or more 16 bit
pointer(s))

llvm-svn: 51027

Instead of a vector load, shuffle and then extract an element. Load the element from address with an offset.
        pshufd $1, (%rdi), %xmm0
        movd %xmm0, %eax
=>
        movl 4(%rdi), %eax

llvm-svn: 51026

llvm-svn: 51024

llvm-svn: 51023

address of the PassInfo directly instead of calling getPassInfo.
This eliminates a bunch of dynamic initializations of static data.

Also, fold RegisterPassBase into PassInfo, make a bunch of its
data members const, and rearrange some code to initialize data
members in constructors instead of using setter member functions.

llvm-svn: 51022

llvm-svn: 51021

llvm-svn: 51020

llvm-svn: 51019

several things that were neither in an anonymous namespace nor static
but not intended to be global.

llvm-svn: 51017

Teach X86 a few more vsetcc patterns.  Custom lowering for unsupported ones is next.

llvm-svn: 51009

Xform bitconvert(build_pair(load a, load b)) to a single load if the load locations are at the right offset from each other.

llvm-svn: 51008

if those blocks consist entirely of common instructions;
merging will not add an extra branch in this case.

llvm-svn: 51006

changes that don't change functionality.

llvm-svn: 51004

"is{Trivially,Really}ReMaterializable" methods.

llvm-svn: 51001

llvm-svn: 51000

semantically identical, but little difference in
either results or execution speed; but it's much
easier to read, at least IMO.

llvm-svn: 50999

llvm-svn: 50998