[Sparc] Emit correct encoding for atomic instructions. Also, add support for parsing CAS instructions to test the CAS encoding. 

llvm-svn: 200963

llvm-svn: 200962

llvm-svn: 200961

llvm-svn: 200960

If we are in the middle of defining the class, don't attempt to
validate previously annotated declarations.  We may not have seen base
specifiers or virtual method declarations yet.

llvm-svn: 200959

Fix a bug triggered in IfConverterTriangle when CvtBB has multiple predecessors
by getting the weights before removing a successor.

llvm-svn: 200958

Generalize the AArch64 .td nodes for AssertZext and AssertSext. Use
them to match the relevant pextr store instructions.

The test widen_load-2.ll requires a slight change because with the
stores gone, the remaining instructions are scheduled in a different
order.

Add test cases for SSE4 and AVX variants.

Resolves rdar://13414672.

Patch by Adam Nemet <anemet@apple.com>.

llvm-svn: 200957

llvm-svn: 200956

llvm-svn: 200955

type-dependent variable, even if the initializer isn't value-dependent. This
happens for ParenListExprs composed of non-value-dependent subexpressions, for
instance.

We should really give ParenListExprs (and InitListExprs) the type of the
initialized entity if they're used to represent a dependent initialization (and
if so, set them to be type-, value- and instantiation-dependent).

llvm-svn: 200954

certain receiver types.

llvm-svn: 200953

The diagnostic printer expects the LangOptions to still be alive. Give it one that lives at least as long as all the uses of it. This is still wrong though, we should be passing in the correct LangOpts for a given source file.

llvm-svn: 200952

<rdar://problem/15958296>

llvm-svn: 200951

selector when compiling an expression in an
Objective-C context.

<rdar://problem/15797390>

llvm-svn: 200950

Differential Revision: http://llvm-reviews.chandlerc.com/D2708

llvm-svn: 200949

expression.

llvm-svn: 200948

mode.

Basically the idea is to transform code like this:
%idx = add nsw i32 %a, 1
%sextidx = sext i32 %idx to i64
%gep = gep i8* %myArray, i64 %sextidx
load i8* %gep

Into:
%sexta = sext i32 %a to i64
%idx = add nsw i64 %sexta, 1
%gep = gep i8* %myArray, i64 %idx
load i8* %gep

That way the computation can be folded into the addressing mode.

This transformation is done as part of the addressing mode matcher.
If the matching fails (not profitable, addressing mode not legal, etc.), the
matcher will revert the related promotions.

<rdar://problem/15519855>

llvm-svn: 200947

llvm-svn: 200946

llvm-svn: 200945

llvm-svn: 200944

llvm-svn: 200943

llvm-svn: 200942

This solves a problem where a def machine operand has no uses but has
not been marked dead. In this case, the initial RP analysis was being
extra precise and determining from LiveIntervals the the register was
actually dead. This caused us to omit the register from the RP
tracker's block live out. That's all good, but the per-instruction
summary still accounted for it as a valid def. This could cause an
assertion in the tracker later when we underflow pressure.

This is from a bug report on an out-of-tree target. It is not
reproducible on well-behaved targets. I'm just making an obvious fix
without unit test.

llvm-svn: 200941

llvm-svn: 200940

Move some code that was in DynamicLoaderPOSIXDLYD into the
base class DynamicLoader.  In the case of UpdateLoadedSections(),
the test to see whether a file is loadable (its address is zero)
is not generally applicable so that test is changed to a more
universally applicable check for the SHF_ALLOC flag on the section.

Also make it explicit that the reading of the module_id in
DynamicLoaderPOSIXDYLD::GetThreadLocalData() is using a hardcoded
size (of module_id) of 4, which might not be appropriate on
big-endian 64-bit systems, leaving a FIXME comment in place.

llvm-svn: 200939

Use the verify hook rather than the compile hook to represent the
-verify-pch action, and move the exising --verify-debug-info action
into its own subclass of VerifyJobAction.  Incidentally change the name
printed by -ccc-print-phases for --verify-debug-info.

llvm-svn: 200938

Revert r200095 and r200152. It turns out when compiling with -arch armv7 -mcpu=cortex-m3, the triple would still set iOS as the OS so the hack is still needed. rdar://15984891

llvm-svn: 200937

Upgrade the interceptor, and attempt to fix the Android build.

llvm-svn: 200936

llvm-svn: 200935

llvm-svn: 200934

llvm-svn: 200933

There was a problem with the old pattern, so we were copying some
larger immediates into registers when we could have been encoding
them in the instruction.

llvm-svn: 200932

The approach is similar to the existing inline-asm reporting, just more
general.

<rdar://problem/15886278>

llvm-svn: 200931

The "-n" and "-p" options to the lldb driver no longer worked after recent IOHandler changes, this is now fixed.

<rdar://problem/15962763>

llvm-svn: 200930

In a previous commit (r199818) we added a const_cast to an existing
subtarget info instead of creating a new one so that we could reuse
it when creating the TargetAsmParser for parsing inline assembly.
This cast was necessary because we needed to reuse the existing STI
to avoid generating incorrect code when the inline asm contained
mode-switching directives (e.g. .code 16).

The root cause of the failure was that there was an implicit sharing
of the STI between the parser and the MCCodeEmitter. To fix a
different but related issue, we now explicitly pass the STI to the
MCCodeEmitter (see commits r200345-r200351).

The const_cast is no longer necessary and we can now create a fresh
STI for the inline asm parser to use.

Differential Revision: http://llvm-reviews.chandlerc.com/D2709

llvm-svn: 200929

The most important part of this is probably adding any cost at all for
operations like zext <8 x i8> to <8 x i32>. Before they were being
recorded as extremely costly (24, I believe) which made LLVM fall back
on a 4-wide vectorisation of a loop.

It also rebalances the values for sext, zext and trunc. Lacking any
other sane metric that might work across CPU microarchitectures I went
for instructions. This seems to be in reasonable accord with the rest
of the table (sitofp, ...) though no doubt at least one value is
sub-optimal for some bizarre reason.

Finally, separate AVX and AVX2 values are provided where appropriate.
The CodeGen is quite different in many cases.

rdar://problem/15981990

llvm-svn: 200928

llvm-svn: 200927

llvm-svn: 200926

llvm-svn: 200925

Summary:
This patch introduces several improvements to clang-tidy diagnostic;
  1. Make filtering of messages from non-user code more reliable. Output an
     error when it or any of the related notes touches user code. This fixes an
     assertion when an error has a location in a system header, and one of the
     notes relates to user code.
  2. In order for 1. to work, subscribe to the static analyzer diagnostics using
     a custom PathDiagnosticConsumer.
  3. Enable colors on supported terminals.
  4. Output FixItHints.

Reviewers: djasper

Reviewed By: djasper

CC: cfe-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D2714

llvm-svn: 200924