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  1. Mar 16, 2010
    • Bob Wilson's avatar
      Fix unused variable warnings. · ceda0780
      Bob Wilson authored
      llvm-svn: 98642
      ceda0780
    • Bob Wilson's avatar
      --- Reverse-merging r98637 into '.': · 1b4e8cc6
      Bob Wilson authored
      U    test/CodeGen/ARM/tls2.ll
      U    test/CodeGen/ARM/arm-negative-stride.ll
      U    test/CodeGen/ARM/2009-10-30.ll
      U    test/CodeGen/ARM/globals.ll
      U    test/CodeGen/ARM/str_pre-2.ll
      U    test/CodeGen/ARM/ldrd.ll
      U    test/CodeGen/ARM/2009-10-27-double-align.ll
      U    test/CodeGen/Thumb2/thumb2-strb.ll
      U    test/CodeGen/Thumb2/ldr-str-imm12.ll
      U    test/CodeGen/Thumb2/thumb2-strh.ll
      U    test/CodeGen/Thumb2/thumb2-ldr.ll
      U    test/CodeGen/Thumb2/thumb2-str_pre.ll
      U    test/CodeGen/Thumb2/thumb2-str.ll
      U    test/CodeGen/Thumb2/thumb2-ldrh.ll
      U    utils/TableGen/TableGen.cpp
      U    utils/TableGen/DisassemblerEmitter.cpp
      D    utils/TableGen/RISCDisassemblerEmitter.h
      D    utils/TableGen/RISCDisassemblerEmitter.cpp
      U    Makefile.rules
      U    lib/Target/ARM/ARMInstrNEON.td
      U    lib/Target/ARM/Makefile
      U    lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
      U    lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
      U    lib/Target/ARM/AsmPrinter/ARMInstPrinter.h
      D    lib/Target/ARM/Disassembler
      U    lib/Target/ARM/ARMInstrFormats.td
      U    lib/Target/ARM/ARMAddressingModes.h
      U    lib/Target/ARM/Thumb2ITBlockPass.cpp
      
      llvm-svn: 98640
      1b4e8cc6
    • Johnny Chen's avatar
      Initial ARM/Thumb disassembler check-in. It consists of a tablgen backend · 3d9327bd
      Johnny Chen authored
      (RISCDisassemblerEmitter) which emits the decoder functions for ARM and Thumb,
      and the disassembler core which invokes the decoder function and builds up the
      MCInst based on the decoded Opcode.
      
      Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm
      instructions to help disassembly.
      
      We also changed the output of the addressing modes to omit the '+' from the
      assembler syntax #+/-<imm> or +/-<Rm>.  See, for example, A8.6.57/58/60.
      
      And modified test cases to not expect '+' in +reg or #+num.  For example,
      
      ; CHECK:       ldr.w	r9, [r7, #28]
      
      llvm-svn: 98637
      3d9327bd
    • Bob Wilson's avatar
      Stop using the old pre-UAL syntax for LDM/STM instruction suffixes. · 298a83ec
      Bob Wilson authored
      This does not move entirely to UAL syntax, since the default "increment after"
      suffix is empty but we still use "IA" for that.
      
      llvm-svn: 98635
      298a83ec
    • Chris Lattner's avatar
      fix the same bug on the x86-64 side of the fence. · cf910439
      Chris Lattner authored
      llvm-svn: 98616
      cf910439
    • Chris Lattner's avatar
      fix the encoding of TAILJMPd. This fixes Benchmarks/Olden/bisort · f5fec8fd
      Chris Lattner authored
      with the integrated assembler!
      
      llvm-svn: 98615
      f5fec8fd
    • Bob Wilson's avatar
      Wrap a long line and add some parens to be consistent. · ba75e816
      Bob Wilson authored
      llvm-svn: 98596
      ba75e816
    • Daniel Dunbar's avatar
      MC: Allow modifiers in MCSymbolRefExpr, and eliminate X86MCTargetExpr. · 55992564
      Daniel Dunbar authored
       - Although it would be nice to allow this decoupling, the assembler needs to be able to reason about MCSymbolRefExprs in too many places to make this viable. We can use a target specific encoding of the variant if this becomes an issue.
       - This patch also extends llvm-mc to support parsing of the modifiers, as opposed to lumping them in with the symbol.
      
      llvm-svn: 98592
      55992564
    • Dan Gohman's avatar
      Recognize code for doing vector gather/scatter index calculations with · c6ddebd6
      Dan Gohman authored
      32-bit indices. Instead of shuffling each element out of the index vector,
      when all indices are needed, just store the input vector to the stack and
      load the elements out.
      
      llvm-svn: 98588
      c6ddebd6
    • Bob Wilson's avatar
      Translate "cc" clobber in ARM inline assembly to ARM::CCRRegisterClass. · 3f2293bc
      Bob Wilson authored
      Radar 7459078.
      
      llvm-svn: 98586
      3f2293bc
  2. Mar 15, 2010
  3. Mar 14, 2010
  4. Mar 13, 2010
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