llvm-svn: 27460

llvm-svn: 27459

llvm-svn: 27458

llvm-svn: 27457

llvm-svn: 27456

llvm-svn: 27455

llvm-svn: 27454

llvm-svn: 27453

us to compile oh-so-realistic stuff like this:

 vec_vperm(A, B, (vector unsigned char){14});

to:
        vspltb v0, v0, 14

instead of:

        vspltisb v0, 14
        vperm v0, v2, v1, v0

llvm-svn: 27452

llvm-svn: 27451

lower it and LLVM to have one fewer intrinsic.  This implements
CodeGen/PowerPC/vec_shuffle.ll

llvm-svn: 27450

llvm-svn: 27449

vperm with a perm mask lvx'd from the constant pool.

llvm-svn: 27448

universal binary, by specifying UNIVERSAL=1 on the make command line.

llvm-svn: 27447

llvm-svn: 27446

llvm-svn: 27445

llvm-svn: 27444

llvm-svn: 27443

llvm-svn: 27442

llvm-svn: 27441

llvm-svn: 27440

llvm-svn: 27439

llvm-svn: 27438

vector_shuffle v1, v1, <0, 4, 1, 5, 2, 6, 3, 7>

This is turned into
vector_shuffle v1, <undef>, <0, 0, 1, 1, 2, 2, 3, 3>
by dag combiner.

It would match a {p}unpckl on x86.

llvm-svn: 27437

CodeGen/X86/2006-04-04-CrossBlockCrash.ll

llvm-svn: 27436

llvm-svn: 27435

llvm-svn: 27434

llvm-svn: 27433

or custom lowering fails.

llvm-svn: 27432

llvm-svn: 27431

llvm-svn: 27430

llvm-svn: 27429

llvm-svn: 27428

llvm-svn: 27427

llvm-svn: 27426

llvm-svn: 27425

llvm-svn: 27424

llvm-svn: 27423

llvm-svn: 27422

llvm-svn: 27421