markers. In some cases a register def is dead on one path, but not on
another.

This is passing Clang self-hosting.

llvm-svn: 131214

    o get_parent_frame(frame)
    o get_args_as_string(frame)

to lldbutil.py and create TestFrameUtils.py to exercise the utils.
Plus re-arrange the test/python_api/lldbutil to have three directories
for testing iteration, process stack traces, and the just added frame utils.

llvm-svn: 131213

llvm-svn: 131212

Fix PR9902: correctly substitute alias templates within the template in which they are defined: provide an empty list of arguments for each containing template context during substitution.

llvm-svn: 131211

Interleave IV simplifications. Currently involves EliminateComparison
and EliminateRemainder. Next I'll add EliminateExtend.

llvm-svn: 131210

argument deduction failures. Only implemented in C++0x, since this is
a significant change in behavior from C++98/03.

llvm-svn: 131209

llvm-svn: 131208

nested of an out-of-line declaration, only require a 'template<>'
header for each enclosing class template that hasn't been previously
specialized; previously, we were requiring 'template<>' for enclosing
class templates and members of class templates that hadn't been
previously specialized. Fixes <rdar://problem/9422013>.

llvm-svn: 131207

llvm-svn: 131206

LLVM and binutils.

With this patch, there are no functional differences between the .o
produced directly from LLVM versus the .s to .o via GNU as, for relocation tags
at least, for both PIC and non-PIC modes.

Because some non-PIC reloc tags are used (legally) on PIC, so IsPCRel flag is
necessary but not sufficient to determine whether the overall codegen mode is
PIC or not. Why is this necessary? There is an incompatibility of how relocs
are emitted in the .rodata section.  Binutils PIC likes to emit certain relocs
as section relative offsets.  Non-PIC does not do this.

So I added a hidden switch on the ELFObjectwriter "-arm-elf-force-pic" which
forces the objectwriter to pretend that all relocs are for PIC mode.


Todo: Activate ForceARMElfPIC to true if -relocation-model=pic is selected
on llc.

Todo: There are probably more issues for PIC mode on ARM/MC/ELF...

Todo: Existing tests in MC/ARM/elf-reloc*.ll need to be converted over to .s 
tests as well as expanded to cover the gamut.

llvm-svn: 131205

This means we get C++0x jump-across-intializer semantics correct.

llvm-svn: 131204

Yes, I'm aware that the diagnostics are awful.

Tests to follow.

llvm-svn: 131203

llvm-svn: 131202

In Microsoft mode, allow conversion from pointer to integral type no matter what size the integral type is. Necessary to parse MFC code.

Example:
void f(char *ptr) {
  char var = (char)ptr;
}

llvm-svn: 131201

Part of rdar://8470697

llvm-svn: 131200

Corrected some bugs in both memory and the tests.  Preparing for being able to turn on support for alias templates.

llvm-svn: 131199

llvm-svn: 131198

llvm-svn: 131196

Identify end of prologue (and beginning of function body) using DW_LNS_set_prologue_end line table opcode.

llvm-svn: 131194

respective ABI plugins as they were plug-ins that supplied ABI specfic info.

Also hookep up the UnwindAssemblyInstEmulation so that it can generate the
unwind plans for ARM.

Changed the way ABI plug-ins are handed out when you get an instance from
the plug-in manager. They used to return pointers that would be mananged
individually by each client that requested them, but now they are handed out
as shared pointers since there is no state in the ABI objects, they can be
shared.

llvm-svn: 131193

about to be spilled.

This can only happen when two extra snippet registers are included in the spill,
and there is a copy between them. Hoisting the spill creates problems because
the hoist will mark the copy for later dead code elimination, and spilling the
second register will turn the copy into a spill.

<rdar://problem/9420853>

llvm-svn: 131192

llvm-svn: 131191

llvm-svn: 131190

llvm-svn: 131189

Concludes // radar://8823265.

llvm-svn: 131188

llvm-svn: 131187

This change allows bugpoint to pinpoint the "opt" pass and bitcode
segment responsible for a crash caused by miscompilation. At least it
works well for me now, without having to create any custom execution
wrappers.

llvm-svn: 131186

Add ability to recognize/handle quotes around commands
(e.g. '"target" create'  works as well as 'target create').

llvm-svn: 131185

llvm-svn: 131184

Fixes a bug in the DAGCombiner.  LoadSDNodes have two values (data, chain).
If there is a store after the load node, then there is a chain, which means
that there is another user. Thus, asking hasOneUser would fail. Instead we
ask hasNUsesOfValue on the 'data' value.

llvm-svn: 131183

gcc.

Fixes PR9886.

llvm-svn: 131182

gcc.

Fixes PR9886.

llvm-svn: 131181

Add custom lowering of X86 vector SRA/SRL/SHL when the shift amount is a splat vector.

llvm-svn: 131179

then teach -Wreturn-type to handle the same.  Net effect:  we now correctly
handle noreturn attributes on member calls in the CFG.

llvm-svn: 131178

dynamic_cast correctly.

llvm-svn: 131177

to provide a reduced testcase.

llvm-svn: 131176

This removes 2 errors when parsing MFC code with clang

Example:
class A {
    virtual void f() = 0 { }
}

llvm-svn: 131175

intrinsic call. This prevents it from being reordered so that it appears
*before* the setjmp intrinsic (thus making it completely useless).
<rdar://problem/9409683>

llvm-svn: 131174

llvm-svn: 131173

at the start of basic blocks to their common predecessor. It's actually quite
common (e.g. about 50 times in JM/lencod) and has shown to be a nice code size
benefit. e.g.

        pushq   %rax
        testl   %edi, %edi
        jne     LBB0_2
## BB#1:
        xorb    %al, %al
        popq    %rdx
        ret
LBB0_2:
        xorb    %al, %al
        callq   _foo
        popq    %rdx
        ret

=>

        pushq   %rax
        xorb    %al, %al
        testl   %edi, %edi
        je      LBB0_2
## BB#1:
        callq   _foo
LBB0_2:
        popq    %rdx
        ret

rdar://9145558

llvm-svn: 131172