llvm-svn: 140916

llvm-svn: 140906

All the sub-class bit vectors are computed when first creating the
register bank.

llvm-svn: 140905

llvm-svn: 140904

llvm-svn: 140903

and the alignment is 0 (i.e., it's defined globally in one file and declared in
another file) it could get an alignment which is larger than the ABI allows for
that type, resulting in aligned moves being used for unaligned loads.

For instance, in file A.c:

   struct S s;

In file B.c:
   struct {
     // something long
   };
   extern S s;

   void foo() {
     struct S p = s;
     // ...
   }

this copy is a 'memcpy' which is turned into a series of 'movaps' instructions
on X86. But this is wrong, because 'struct S' has alignment of 4, not 16.

llvm-svn: 140902

llvm-svn: 140899

This uses less memory and it reduces the complexity of sub-class
operations:

- hasSubClassEq() and friends become O(1) instead of O(N).

- getCommonSubClass() becomes O(N) instead of O(N^2).

In the future, TableGen will infer register classes.  This makes it
cheap to add them.

llvm-svn: 140898

This one can also print 32-bit groups.

llvm-svn: 140897

It will soon need the context.

llvm-svn: 140896

Use these lists instead of computing them on the fly in
RegisterInfoEmitter.

llvm-svn: 140895

llvm-svn: 140892

Patch by Reed Kotler at Mips Technologies.

llvm-svn: 140891

Patch by Reed Kotler at Mips Technologies.

llvm-svn: 140887

Patch by Reed Kotler at Mips Technologies.

llvm-svn: 140886

Patch by Reed Kotler at Mips Technologies.

llvm-svn: 140885

Test of indexing lists of lists of lists works.  This also exercises
some operators.

llvm-svn: 140884

Add a TableGen test to check if indexing lists of lists works.

llvm-svn: 140883

Implement VarListElementInit:: resolveListElementReference so that
lists of lists can be indexed.

llvm-svn: 140882

llvm-svn: 140879

Patch by Reed Kotler at Mips Technologies.

llvm-svn: 140878

llvm-svn: 140875

llvm-svn: 140874

llvm-svn: 140873

llvm-svn: 140872

llvm-svn: 140870

InstCombine was incorrectly considering the conversion of the constant
zero to be unsafe.

We want to transform:
define float @bar(float %x) nounwind readnone optsize ssp {
  %conv = fpext float %x to double
  %cmp = fcmp olt double %conv, 0.000000e+00
  %conv1 = zext i1 %cmp to i32
  %conv2 = sitofp i32 %conv1 to float
  ret float %conv2
}

Into:
define float @bar(float %x) nounwind readnone optsize ssp {
  %cmp = fcmp olt float %x, 0.000000e+00   ; <---- This
  %conv1 = zext i1 %cmp to i32
  %conv2 = sitofp i32 %conv1 to float
  ret float %conv2
}


rdar://10215914

llvm-svn: 140869

llvm-svn: 140868

llvm-svn: 140865

This matches clang, so default options in llc and friends are now closer to
clang's defaults.

llvm-svn: 140863

llvm-svn: 140862

Remove an assert that was expecting only the relevant 16bit portion for
the fixup being handled. Also kill some dead code in the T2 portion.

rdar://9653509

llvm-svn: 140861

llvm-svn: 140860

Thanks to Alexandru Dura and Jonas Paulsson for finding it.

llvm-svn: 140859

is a catch-all landingpad clause.

llvm-svn: 140858

llvm-svn: 140856

llvm-svn: 140855

Also take this opportunity to clean up the rounding mode pass.

llvm-svn: 140854

catch or repeated filter clauses.  Teach instcombine a bunch
of tricks for simplifying landingpad clauses.  Currently the
code only recognizes the GNU C++ and Ada personality functions,
but that doesn't stop it doing a bunch of "generic" transforms
which are hopefully fine for any real-world personality function.
If these "generic" transforms turn out not to be generic, they
can always be conditioned on the personality function.  Probably
someone should add the ObjC++ personality function.  I didn't as
I don't know anything about it.

llvm-svn: 140852

llvm-svn: 140851