the AsmPrinter::GetMBBSymbol.

llvm-svn: 94515

AsmPrinter::SetupMachineFunction sets it.  Note that systemz
and msp430 didn't.  Yay for reduced inconsistency! :)

llvm-svn: 94510

MachineFunctionAnalysis dole them out, instead of having
AsmPrinter do both.  Have the AsmPrinter::SetupMachineFunction
method set the 'AsmPrinter::MF' variable.

llvm-svn: 94509

llvm-svn: 94502

llvm-svn: 94490

llvm-svn: 94489

TargetAsmLexer.

llvm-svn: 94482

dbg.declare's we currently generate go through both
register allocators without perturbing the results.

llvm-svn: 94480

llvm-svn: 94479

llvm-svn: 94477

entries with @GOTOFF whih is EK_GPRel32BlockAddress.

llvm-svn: 94474

1. MachineJumpTableInfo is now created lazily for a function the first time
   it actually makes a jump table instead of for every function.
2. The encoding of jump table entries is now described by the
   MachineJumpTableInfo::JTEntryKind enum.  This enum is determined by the
   TLI::getJumpTableEncoding() hook, instead of by lots of code scattered
   throughout the compiler that "knows" that jump table entries are always
   32-bits in pic mode (for example).
3. The size and alignment of jump table entries is now calculated based on
   their kind, instead of at machinefunction creation time.

Future work includes using the EntryKind in more places in the compiler,
eliminating other logic that "knows" the layout of jump tables in various
situations.

llvm-svn: 94470

llvm-svn: 94464

TargetAsmLexer.  Dialect-specific lexing code will
be placed in the functions LexTokenATT() and
LexTokenIntel().

llvm-svn: 94456

llvm-svn: 94449

and MCize the non-pic case.  Now printPICJumpTableEntry really
is just about printing PIC entries.

llvm-svn: 94446

llvm-svn: 94445

rename it to avoid shadowing.

llvm-svn: 94440

even on x86-32/elf which uses a GOT.

llvm-svn: 94439

normal form of .file would fail if the filename had a weird character
in it.

llvm-svn: 94437

llvm-svn: 94436

Previously we would just silently miscompile code that used aligned
common's, now at least you'll get a build error.  tiger-ppc already
triggered the build error because it didn't have a version of this
logic.

llvm-svn: 94412

llvm-svn: 94378

movw	$8, (_cost_table_-L97$pb)+66(%eax)

After the parens, we could still have a binop.

llvm-svn: 94345

the alignment allows.  Fixed a bug where we didn't use a
vector load/store for PR5626.

llvm-svn: 94338

a .section.  Switch to it with SwitchSection.

However, I think that this directive should be safe on any ELF target.
If so, we should hoist it up out of the X86 and SystemZ targets.

llvm-svn: 94298

into a new MCDirectives.h file.

llvm-svn: 94294

stack may be misaligned.

Update test accordingly.

Patch by Evan Cheng!

llvm-svn: 94291

llvm-svn: 94285

llvm-svn: 94278

target-specific AsmLexer, and added the appropriate
registration calls.

llvm-svn: 94275

be static.  Also made it possible for clients to get it
and no other functions from ...GenAsmMatcher.inc by
defining REGISTERS_ONLY before including GenAsmMatcher.inc.
This sets the stage for target-specific lexers that can
identify registers and return AsmToken::Register as
appropriate.

llvm-svn: 94266

llvm-svn: 94254

llvm-svn: 94205

missing ones are libsupport, libsystem and libvmcore.  libvmcore is
currently blocked on bugpoint, which uses EH.  Once it stops using
EH, we can switch it off.

This #if 0's out 3 unit tests, because gtest requires RTTI information.
Suggestions welcome on how to fix this.

llvm-svn: 94164

llvm-svn: 94147

llvm-svn: 94129

This new version is much more aggressive about doing "full" reduction in
cases where it reduces register pressure, and also more aggressive about
rewriting induction variables to count down (or up) to zero when doing so
reduces register pressure.

It currently uses fairly simplistic algorithms for finding reuse
opportunities, but it introduces a new framework allows it to combine
multiple strategies at once to form hybrid solutions, instead of doing
all full-reduction or all base+index.

llvm-svn: 94061

Fix a minor issue in x86 load / store folding table. movups does an unaligned load so it doesn't require 16-byte alignment.

llvm-svn: 94058

llvm-svn: 94032