- Dec 15, 2009
-
-
Jim Grosbach authored
llvm-svn: 91371
-
Dan Gohman authored
llvm-svn: 91362
-
- Dec 14, 2009
-
-
Johnny Chen authored
between BR_JTr and STREXD. llvm-svn: 91339
-
Jim Grosbach authored
llvm-svn: 91333
-
Jim Grosbach authored
llvm-svn: 91329
-
Johnny Chen authored
llvm-svn: 91327
-
Jim Grosbach authored
llvm-svn: 91321
-
Chris Lattner authored
Here's the diagnostic from clang: /Volumes/Data/dgregor/Projects/llvm/lib/Target/CppBackend/CPPBackend.cpp:989:23: warning: 'gv' is always NULL in this context printConstant(gv); ^ 1 diagnostic generated. llvm-svn: 91318
-
Jim Grosbach authored
llvm-svn: 91313
-
Jim Grosbach authored
llvm-svn: 91310
-
Jim Grosbach authored
llvm-svn: 91307
-
Jim Grosbach authored
llvm-svn: 91305
-
Jim Grosbach authored
llvm-svn: 91284
-
Bill Wendling authored
llvm-svn: 91274
-
Jim Grosbach authored
llvm-svn: 91260
-
- Dec 13, 2009
-
-
Anton Korobeynikov authored
llvm-svn: 91232
-
Eli Friedman authored
llvm-svn: 91230
-
- Dec 12, 2009
-
-
Eli Friedman authored
merging x >u 5 and x <s 20 because it's impossible to implement. llvm-svn: 91228
-
Evan Cheng authored
llvm-svn: 91223
-
Anton Korobeynikov authored
No testcase yet - it seems we're exposing generic codegen bugs. llvm-svn: 91221
-
Evan Cheng authored
llvm-svn: 91220
-
Evan Cheng authored
llvm-svn: 91219
-
Jim Grosbach authored
just issues an error for the moment. The front end won't yet generate these intrinsics for ARM, so this is behind the scenes until complete. llvm-svn: 91200
-
Anton Korobeynikov authored
Based on the patch by Brian Lucas! llvm-svn: 91175
-
- Dec 11, 2009
-
-
Dan Gohman authored
llvm-svn: 91158
-
Jim Grosbach authored
memory barrier instructions by definition have side effects. This prevents the post-RA scheduler from moving them around. llvm-svn: 91150
-
Anton Korobeynikov authored
This is used in some weird cases like general dynamic TLS model. This fixes PR5723 llvm-svn: 91144
-
Johnny Chen authored
llvm-svn: 91143
-
Jim Grosbach authored
llvm-svn: 91140
-
Evan Cheng authored
llvm-svn: 91104
-
Jim Grosbach authored
llvm-svn: 91090
-
- Dec 10, 2009
-
-
Jim Grosbach authored
llvm-svn: 91053
-
Jim Grosbach authored
Add memory barrier intrinsic support for ARM. Moving towards adding the atomic operations intrinsics. llvm-svn: 91003
-
- Dec 09, 2009
-
-
Evan Cheng authored
vector_shuffle (scalar_to_vector (i32 load (ptr + 4))), undef, <0, 0, 0, 0> => vector_shuffle (v4i32 load ptr), undef, <1, 1, 1, 1> iff ptr is 16-byte aligned (or can be made into 16-byte aligned). llvm-svn: 90984
-
Evan Cheng authored
llvm-svn: 90925
-
Evan Cheng authored
Move isConsecutiveLoad to SelectionDAG. It's not target dependent and it's primary used by selectdag passes. llvm-svn: 90922
-
Evan Cheng authored
- Also support the 'q' NEON registers asm code. llvm-svn: 90894
-
- Dec 08, 2009
-
-
Anton Korobeynikov authored
Reduce (cmp 0, and_su (foo, bar)) into (bit foo, bar). This saves extra instruction. Patch inspired by Brian Lucas! llvm-svn: 90819
-
- Dec 07, 2009
-
-
Dan Gohman authored
current form, it is too expensive in compile time. llvm-svn: 90781
-
Anton Korobeynikov authored
llvm-svn: 90742
-