llvm-svn: 98471

llvm-svn: 98470

Do not force indirect tailcall through fixed registers: eax, r11. Add support to allow loads to be folded to tail call instructions.

llvm-svn: 98465

llvm-svn: 98464

an MCSymbol.  Make the EH_LABEL MachineInstr hold its label
with an MCSymbol instead of ID.  Fix a bug in MMI.cpp which
would return labels named "Label4" instead of "label4".

llvm-svn: 98463

them with a counter.

llvm-svn: 98462

consistently use MCSymbol and only call this predicate after
they should have been emitted.

llvm-svn: 98461

llvm-svn: 98460

instead of label ID's.  This cleans up and regularizes a bunch 
of code and makes way for future progress.

Unfortunately, this pointed out to me that JITDwarfEmitter.cpp
is largely copy and paste from DwarfException/MachineModuleInfo
and other places.  This is very sad and disturbing. :(

One major change here is that TidyLandingPads moved from being
called in DwarfException::BeginFunction to being called in
DwarfException::EndFunction.  There should not be any 
functionality change from doing this, but I'm not an EH expert.

llvm-svn: 98459

llvm-svn: 98458

llvm-svn: 98457

llvm-svn: 98456

llvm-svn: 98454

llvm-svn: 98451

and passing off ownership to AsmPrinter.  Now MachineModuleInfo
creates it and owns it by value.  This allows us to use MCSymbols
more consistently throughout the rest of the code generator, and
simplifies a bit of code.  This also allows MachineFunction to 
keep an MCContext reference handy, and cleans up the TargetRegistry
interfaces for AsmPrinters.

llvm-svn: 98450

Tested: make check-lit && valgrind --dsymutil=yes --leak-check=full unittests/ExecutionEngine/JIT/Debug/JITTests
llvm-svn: 98447

llvm-svn: 98444

llvm-svn: 98443

llvm-svn: 98442

llvm-svn: 98433

instead of as a stem+idx pair, simplify the "is a new 
location" check to use symbol comparison.

llvm-svn: 98432

llvm-svn: 98431

llvm-svn: 98430

llvm-svn: 98429

base register updating load/store-multiple instructions.

llvm-svn: 98427

llvm-svn: 98426

relative to the fragment address, not its offset. This was masked by the text
section normally being at address 0.

llvm-svn: 98420

compiler may not lead with the text section.

llvm-svn: 98418

llvm-svn: 98416

entries to not thrash std::strings and MCSymbols.

llvm-svn: 98415

targets.  This is a temporary hack for the .o file writer that Daniel
wants :)

llvm-svn: 98413

Tested: clang debug bootstrap, llvm-gcc bootstrap, `make check-lit`
after configuring with --with-llvmgccdir (and this did run the
FrontendC* tests this time)

llvm-svn: 98410

writebacks to the address register.  This gets rid of the hack that the
first register on the list was the magic writeback register operand.  There
was an implicit constraint that if that operand was not reg0 it had to match
the base register operand.  The post-RA scheduler's antidependency breaker
did not understand that constraint and sometimes changed one without the
other.  This also fixes Radar 7495976 and should help the verifier work
better for ARM code.

There are now new ld/st instructions explicit writeback operands and explicit
constraints that tie those registers together.

llvm-svn: 98409

llvm-svn: 98408

other functionality on 403.gcc compiled at -O0.

llvm-svn: 98405

llvm-svn: 98403

mostly the same.

llvm-svn: 98402

Use CodeMetrics.analyzeBasicBlock() to estimate BB size.

llvm-svn: 98401

llvm-svn: 98398

 - The implementation is currently very brain dead and inefficient, but I have a
   clear plan on how to fix it.

 - The good news is, it works and correctly assembles 403.gcc (when built with
   Clang, at '-Os', '-Os -g', and '-O3'). Even better, at '-Os' and '-Os -g',
   the resulting binary is exactly equivalent to that when built with the system
   assembler. So it probably works! :)

llvm-svn: 98396