dependent. Hopefully, this will fix PR3801.

llvm-svn: 81132

llvm-svn: 81128

llvm-svn: 81126

disabled.

llvm-svn: 81122

Patch by Erick Tryzelaar.

llvm-svn: 81116

about by icc (#593, partial).  Patch by Erick Tryzelaar.

llvm-svn: 81115

(#411).  Patch by Erick Tryzelaar.

llvm-svn: 81113

icc (#177, partial).  Patch by Erick Tryzelaar.

llvm-svn: 81106

llvm-svn: 80978

(i.e., there are no local variables and stuff), we still need to output FDE
information for the pushed registers.

llvm-svn: 80960

llvm-svn: 80956

swapping the operands if necessary.

llvm-svn: 80940

  - when transforming a vector shift of a non-immediate scalar shift amount, zero
    extend the i32 shift amount to i64 since the vector shift reads 64 bits
  - when transforming i16 vectors to use a vector shift, zero extend i16 shift amount
  - improve the code quality in some cases when transforming vectors to use a vector shift

llvm-svn: 80935

disabling the use of 16-bit operations on x86. This doesn't yet work for
inline asms with 16-bit constraints, vectors with 16-bit elements,
trampoline code, and perhaps other obscurities, but it's enough to try
some experiments.

llvm-svn: 80930

from MCAsmLexer.h in preparation of supporting other targets.  Changed the
X86AsmParser code to reflect this by removing AsmLexer::LexPercent and looking
for AsmToken::Percent when parsing in places that used AsmToken::Register.
Then changed X86ATTAsmParser::ParseRegister to parse out registers as an
AsmToken::Percent followed by an AsmToken::Identifier.

llvm-svn: 80929

llvm-svn: 80917

with the new asmprinter.

llvm-svn: 80906

different formatting from the old asmprinter, but it should be 
semantically the same.  We used to get:

	popl	%eax
	addl	$_GLOBAL_OFFSET_TABLE_ + [.-.Lllvm$6.$piclabel], %eax
...

Now we get:

	popl	%eax
.Lpicbaseref6:
	addl	$(_GLOBAL_OFFSET_TABLE_ + (.Lpicbaseref6 - .Lllvm$6.$piclabel)), %eax
...

llvm-svn: 80905

Reference to hidden symbols do not have to go through non-lazy pointer in non-pic mode. rdar://7187172.

llvm-svn: 80904

llvm-svn: 80893

llvm-svn: 80892

and fix a few things using << on MCSymbols to use ->print(). No
functionality change other than unbreaking my previous patch.

llvm-svn: 80890

llvm-svn: 80889

all global variable operand flag processing stuff is shared between
different operand types.

llvm-svn: 80886

llvm-svn: 80885

from operand" logic.  GlobalAddress still todo.

llvm-svn: 80884

olden programs working.

llvm-svn: 80881

X86JITInfo::getLazyResolverFunction() should not read cpu id to determine whether sse is available. Just use consult subtarget.

No functionality changes.

llvm-svn: 80880

llvm-svn: 80874

instruction tables to support segmented addressing (and other objects
of obscure type).
Modified the X86 assembly printers to handle these new operand types.
Added JMP and CALL instructions that use segmented addresses.

llvm-svn: 80857

llvm-svn: 80838

llvm-svn: 80807

llvm-svn: 80806

llvm-svn: 80773

llvm-svn: 80764

conditional moves as a subtarget feature.  This is the easy part of 
PR4841.

llvm-svn: 80763

Added a 64-bit ADD %RAX, imm32 instruction.
Added all 4 forms for AND %rAX, imm and CMP %rAX, imm.

llvm-svn: 80746

llvm-svn: 80729

 - Bruno, please check!!

llvm-svn: 80728

llvm-svn: 80727