Skip to content
  1. Apr 04, 2007
  2. Mar 30, 2007
  3. Mar 27, 2007
  4. Mar 20, 2007
  5. Mar 03, 2007
  6. Mar 02, 2007
  7. Mar 01, 2007
  8. Feb 25, 2007
  9. Feb 23, 2007
  10. Feb 21, 2007
  11. Feb 20, 2007
  12. Feb 08, 2007
    • Evan Cheng's avatar
      Fixed a long standing spiller bug that's exposed by Thumb: · 6ad6fdb7
      Evan Cheng authored
      The code sequence before the spiller is something like:
                       = tMOVrr
              %reg1117 = tMOVrr
              %reg1078 = tLSLri %reg1117, 2
      
      The it starts spilling:
              %r0 = tRestore <fi#5>, 0
              %r1 = tRestore <fi#7>, 0
              %r1 = tMOVrr %r1<kill>
              tSpill %r1, <fi#5>, 0
              %reg1078 = tLSLri %reg1117, 2
      
      It restores the value while processing the first tMOVrr. At this point, the
      spiller remembers fi#5 is available in %r0. Next it processes the second move.
      It restores the source before the move and spills the result afterwards. The
      move becomes a noop and is deleted. However, a spill has been inserted and that
      should invalidate reuse of %r0 for fi#5 and add reuse of %r1 for fi#5.
      Therefore, %reg1117 (which is also assigned fi#5) should get %r1, not %r0.
      
      llvm-svn: 34039
      6ad6fdb7
  13. Jan 23, 2007
  14. Jan 19, 2007
    • Evan Cheng's avatar
      GetRegForReload() now keeps track which registers have been considered and... · fc74e2de
      Evan Cheng authored
      GetRegForReload() now keeps track which registers have been considered and rejected during its quest to find a suitable reload register. This avoids an infinite loop in case like this:
        t1 := op t2, t3
        t2 <- assigned r0 for use by the reload but ended up reuse r1
        t3 <- assigned r1 for use by the reload but ended up reuse r0
        t1 <- desires r1
              sees r1 is taken by t2, tries t2's reload register r0
              sees r0 is taken by t3, tries t3's reload register r1
              sees r1 is taken by t2, tries t2's reload register r0 ...
      
      llvm-svn: 33382
      fc74e2de
  15. Dec 19, 2006
  16. Dec 17, 2006
  17. Dec 15, 2006
  18. Dec 14, 2006
    • Evan Cheng's avatar
      Fix a long-standing spiller bug: · 4c306ae0
      Evan Cheng authored
      If a spillslot value is available in a register, and there is a noop copy that
      targets that register, the spiller correctly decide not to invalidate the
      spillslot register.
      
      However, even though the noop copy does not clobbers the value. It does start a
      new intersecting live range. That means the spillslot register is available for
      use but should not be reused for a two-address instruction modref operand which
      would clobber the new live range.
      
      When we remove the noop copy, update the available information by clearing the
      canClobber bit.
      
      llvm-svn: 32576
      4c306ae0
  19. Dec 08, 2006
  20. Dec 07, 2006
  21. Dec 06, 2006
  22. Dec 01, 2006
  23. Nov 17, 2006
  24. Nov 04, 2006
  25. Nov 02, 2006
  26. Oct 12, 2006
  27. Sep 05, 2006
    • Chris Lattner's avatar
      Fix a long-standing wart in the code generator: two-address instruction lowering · 13a5dcdd
      Chris Lattner authored
      actually *removes* one of the operands, instead of just assigning both operands
      the same register.  This make reasoning about instructions unnecessarily complex,
      because you need to know if you are before or after register allocation to match
      up operand #'s with the target description file.
      
      Changing this also gets rid of a bunch of hacky code in various places.
      
      This patch also includes changes to fold loads into cmp/test instructions in
      the X86 backend, along with a significant simplification to the X86 spill
      folding code.
      
      llvm-svn: 30108
      13a5dcdd
  28. Aug 27, 2006
  29. Aug 25, 2006
    • Chris Lattner's avatar
      Take advantage of the recent improvements to the liveintervals set (tracking · bdf12106
      Chris Lattner authored
      instructions which define each value#) to simplify and improve the coallescer.
      In particular, this patch:
      
      1. Implements iterative coallescing.
      2. Reverts an unsafe hack from handlePhysRegDef, superceeding it with a
         better solution.
      3. Implements PR865, "coallescing" away the second copy in code like:
      
         A = B
         ...
         B = A
      
      This also includes changes to symbolically print registers in intervals
      when possible.
      
      llvm-svn: 29862
      bdf12106
  30. Aug 21, 2006
Loading