Note that the test actually fails before reaching the assertion described in that bug, but the failure is a trivial matter of adding OS-conditional expected stop reason strings (as noted by new comments in this patch).  However, with the stop reason strings changed, the test fails for the more substantial reason noted in bugzilla 14662.

llvm-svn: 170619

llvm-svn: 170618

make sure they came from the same kind of FileIDs.

Thanks to Abramo Bagnara for providing the test case.

llvm-svn: 170616

llvm-svn: 170615

llvm-svn: 170613

Implement the ability for Python commands to be interrupted by pressing CTRL+C
Also add a new Mutex subclass that attempts to be helpful for debugging by logging actions performed on it

FYI of all interested - there is a separate deadlocking issue related to how LLDB dispatches CTRL+C that might cause LLDB to deadlock upon pressing CTRL+C while in a Python command.
This is not a regression, and was just previously masked by us not even trying to bail out of Python commands, so that it would not be clear from a user perspective whether we were
deadlocked or stuck in an inconsistent state within the Python interpreter.

llvm-svn: 170612

rdar://12282267

llvm-svn: 170611

MC disassembler clients (LLDB) are interested in querying if an
instruction may affect control flow other than by virtue of being
an explicit branch instruction. For example, instructions which
write directly to the PC on some architectures.

llvm-svn: 170610

isSub and isSuper return false if RegA == RegB. Add variants which also
include the identity function.

llvm-svn: 170609

These were defined on TargetRegisterInfo, but they don't use any information
that's not available in MCRegisterInfo, so sink them down to be available
at the MC layer.

llvm-svn: 170608

llvm-svn: 170607

fix any bad objectiveC syntax coming out of
DeclPrinter. This is on going. Also, introduce a new
PrintPolicy and use it as needed when declaration tag
is to be produced via DeclPrinter.

llvm-svn: 170606

llvm-svn: 170605

llvm-svn: 170603

Refactor isIntrinsic() to be quicker, and change classof() (and thus, isa<IntrinsicInst>()) to use it. This decreases the number of occurrences of the slow-path string matching performed by getIntrinsicID().

llvm-svn: 170602

for reporting class types from Objective-C runtime
class symbols.  Instead, LLDB now queries the 
Objective-C runtime for class types.

We have also added a (minimal) Objective-C runtime
type vendor for Objective-C runtime version 1, to 
prevent regressions when calling class methods in
the V1 runtime.

Other components of this fix include:

- We search the Objective-C runtime in a few more
  places.

- We enable enumeration of all members of
  Objective-C classes, which Clang does in certain
  circumstances.

- SBTarget::FindFirstType and SBTarget::FindTypes
  now query the Objective-C runtime as needed.

- I fixed several test cases.

<rdar://problem/12885034>

llvm-svn: 170601

llvm-svn: 170600

The single-argument MachineInstr::addOperand(MO) will be removed soon.

llvm-svn: 170599

modules when getting the decls for a namespace or translation unit.

Otherwise the code-completion results will not be complete.

rdar://12889089

llvm-svn: 170596

No testcase because it is apparently not so trivial to construct.

llvm-svn: 170595

llvm-svn: 170594

Unlike SGPRs VGPRs doesn't need to be aligned.

Patch by: Christian König

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>
llvm-svn: 170593

Branch if we have enough instructions so that it makes sense.
Also remove branches if they don't make sense.

Patch by: Christian König

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>
llvm-svn: 170592

This patch replaces the control flow handling with a new
pass which structurize the graph before transforming it to
machine instruction. This has a couple of different advantages
and currently fixes 20 piglit tests without a single regression.

It is now a general purpose transformation that could be not
only be used for SI/R6xx, but also for other hardware
implementations that use a form of structurized control flow.

v2: further cleanup, fixes and documentation

Patch by: Christian König

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
llvm-svn: 170591

llvm-svn: 170590

the abbreviations. Part of implementing split dwarf.

llvm-svn: 170589

Use the version that also takes an MF reference instead.

It would technically be possible to extract an MF reference from the MI
as MI->getParent()->getParent(), but that would not work for MIs that
are not inserted into any basic block.

Given the reasonably small number of places this constructor was used at
all, I preferred the compile time check to a run time assertion.

llvm-svn: 170588

I introduced it in r166785. PR14291.

If TD is unavailable use getScalarSizeInBits, but don't optimize
pointers or vectors of pointers.

llvm-svn: 170586

Building Vectorizers.rst produces a few warnings of the form:

   WARNING: Title underline too short.

Fixed by adding the extra needed dashes under the title.

llvm-svn: 170582

 ((x & 0xff00) >> 8) << 2
to
 (x >> 6) & 0x3fc

This is general goodness since it folds a left shift into the mask. However,
the trailing zeros in the mask prevents the ARM backend from using the bit
extraction instructions. And worse since the mask materialization may require
an addition instruction. This comes up fairly frequently when the result of 
the bit twiddling is used as memory address. e.g.

 = ptr[(x & 0xFF0000) >> 16]

We want to generate:
  ubfx   r3, r1, #16, #8
  ldr.w  r3, [r0, r3, lsl #2]

vs.
  mov.w  r9, #1020
  and.w  r2, r9, r1, lsr #14
  ldr    r2, [r0, r2]

Add a late ARM specific isel optimization to
ARMDAGToDAGISel::PreprocessISelDAG(). It folds the left shift to the
'base + offset' address computation; change the mask to one which doesn't have
trailing zeros and enable the use of ubfx.

Note the optimization has to be done late since it's target specific and we
don't want to change the DAG normalization. It's also fairly restrictive
as shifter operands are not always free. It's only done for lsh 1 / 2. It's
known to be free on some cpus and they are most common for address
computation.

This is a slight win for blowfish, rijndael, etc.

rdar://12870177

llvm-svn: 170581

llvm-svn: 170580

llvm-svn: 170578

When the least bit of C is greater than V, (x&C) must be greater than V
if it is not zero, so the comparison can be simplified.

Although this was suggested in Target/X86/README.txt, it benefits any
architecture with a directly testable form of AND.

Patch by Kevin Schoedel

llvm-svn: 170576

Skip libc++ data formatter tests on Linux because there is no standard location for the makefile to find libc++.

llvm-svn: 170575

Just like for addMemOperand(), the function pointer provides a context
for allocating memory. This will make it possible to use a better memory
allocation strategy for the MI operand list, which is currently a slow
std::vector.

Most calls to addOperand() come from MachineInstrBuilder, so give that
class an MF reference as well. Code using BuildMI() won't need changing
at all since the MF reference is already required to allocate a
MachineInstr.

Future patches will fix code that calls MI::addOperand(Op) directly, as
well as code that uses the now deprecated MachineInstrBuilder(MI)
constructor.

llvm-svn: 170574

category, when those properties will be implemented in category's 
primary class or one of its super classes. // rdar://12568064

llvm-svn: 170573

Forgot to remove trailing whitespace when I converted the BlockLanguageSpec.txt => BlockLanguageSpec.rst. It has been eliminated.

llvm-svn: 170572

llvm-svn: 170571

Change test to dump Filecheck output to an intermediate file.  This makes it easier to update this test.

llvm-svn: 170570

llvm-svn: 170569