Commits · d36cbaa4231e51a42d761d298ff20aaa6e88d014 · Roger Ferrer / llvm-epi-0.8 · GitLab

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Jul 03, 2013
- This corrects the implementation of Thumb ADR instruction. There are three issues: · d36cbaa4
  Mihai Popa authored Jul 03, 2013
  d36cbaa4
Jul 02, 2013
- Fix ARM EHABI compact model 1 and 2 without handlerdata. · c931fce4
  Logan Chien authored Jul 02, 2013
  c931fce4
Jul 01, 2013
- [ARMAsmParser] Sort the ARM register lists based on the encoding value, not the · fa705ee3
  Chad Rosier authored Jul 01, 2013
  fa705ee3
Jun 28, 2013
- ARM: Fix pseudo-instructions for SRS (Store Return State). · de09fae3
  Tilmann Scheller authored Jun 28, 2013
  de09fae3
Jun 27, 2013
- Improve the compression of the tablegen DiffLists by introducing a new sort · ccd06643
  Chad Rosier authored Jun 27, 2013
  ccd06643
Jun 26, 2013
- ARM: fix more cases where predication may or may not be allowed · 2c45a383
  Tim Northover authored Jun 26, 2013
  2c45a383
- ARM: allow predicated barriers in Thumb mode · 52f77f5c
  Tim Northover authored Jun 26, 2013
  52f77f5c
Jun 24, 2013
- ARM: fix thumb1 nop decoding · f2f00b4e
  Amaury de la Vieuville authored Jun 24, 2013
  f2f00b4e
Jun 20, 2013
- This reverts r155000. · f81d036e
  Joey Gouly authored Jun 20, 2013
  f81d036e
Jun 18, 2013
- ARM: Add optional datatype suffix to NEON mvn asm syntax. · a6ed57d8
  Jim Grosbach authored Jun 18, 2013
  a6ed57d8
- Change the arm assembler to support this from the v7c spec: · c5d09357
  Kevin Enderby authored Jun 18, 2013
  c5d09357
- ARM: fix literal load with positive offset encoding · eac0bad0
  Amaury de la Vieuville authored Jun 18, 2013
  eac0bad0
Jun 13, 2013
- ARM: fix t2am_imm8_offset operand printing for imm=#-0 · 231ca2bd
  Amaury de la Vieuville authored Jun 13, 2013
  231ca2bd
Jun 11, 2013
- Rework r183728, suppress assert(0) for now. Its behavior depends on assertions on win32 hosts. · 4d5ee804
  NAKAMURA Takumi authored Jun 11, 2013
  4d5ee804
- It adds support for negative zero offsets for loads and stores. · c1d119ed
  Mihai Popa authored Jun 11, 2013
  c1d119ed
- This patch adds support for FPINST/FPINST2 as operands to vmsr/vmrs. These are... · 1c7be576
  Mihai Popa authored Jun 11, 2013
  1c7be576
- Tweak a couple of tests on win32 hosts with +Asserts. · 1ab3650e
  NAKAMURA Takumi authored Jun 11, 2013
  1ab3650e
- ARM: diagnose ARM/Thumb assembly switches on CPUs only supporting one. · a2292d0b
  Tim Northover authored Jun 10, 2013
  a2292d0b
Jun 10, 2013
- ARM: ISB cannot be passed the same options as DMB · 43cb13a5
  Amaury de la Vieuville authored Jun 10, 2013
  43cb13a5
Jun 09, 2013
- Fix ARM unwind opcode assembler in several cases. · 325823a1
  Logan Chien authored Jun 09, 2013
  325823a1
Jun 05, 2013
- This is a simple patch that changes RRX and RRXS to accept all registers as operands. · 0e9892fe
  Mihai Popa authored Jun 05, 2013
  0e9892fe
May 31, 2013
- ARM: permit upper-case BE/LE on setend instruction · 4d141440
  Tim Northover authored May 31, 2013
  4d141440
- ARM: add fstmx and fldmx instructions for assembly · 4173e29a
  Tim Northover authored May 31, 2013
  4173e29a
May 30, 2013
- Change how we iterate over relocations on ELF. · 4f60a38f
  Rafael Espindola authored May 30, 2013
  4f60a38f
May 14, 2013
- Fix ARM FastISel tests, as a first step to enabling ARM FastISel · bd7c6e50
  Derek Schuff authored May 14, 2013
  bd7c6e50
May 13, 2013
- The purpose of the patch is to fix the syntax of ARM mrc and mrc2 instructions... · dc1764c5
  Mihai Popa authored May 13, 2013
  dc1764c5
May 10, 2013
- Implement AsmParser for ARM unwind directives. · 4ea23b56
  Logan Chien authored May 10, 2013
  4ea23b56
May 08, 2013
- This patch fixes two tests marked as XFAIL among the ARM assembler tests. · 1fb61c6e
  Mihai Popa authored May 08, 2013
  1fb61c6e
Apr 26, 2013
- ARM: Fix encoding of hint instruction for Thumb. · a83d5e9f
  Quentin Colombet authored Apr 26, 2013
  a83d5e9f
Apr 17, 2013
- Fix treatment of ARM unallocated hint instructions. · 6f03f624
  Quentin Colombet authored Apr 17, 2013
  6f03f624
Apr 16, 2013
- ARM: Add VACLT and VACLE assembly aliases. · 9b81a4f0
  Jim Grosbach authored Apr 15, 2013
  9b81a4f0
Apr 12, 2013
- ARM: Correct printing of pre-indexed operands. · c313220b
  Quentin Colombet authored Apr 12, 2013
  c313220b
- Replace coff-/elf-dump with llvm-readobj · ba848e3b
  Nico Rieck authored Apr 12, 2013
  ba848e3b
Apr 10, 2013
- ARM: Make "SMC" instructions conditional on new TrustZone architecture feature. · c6047655
  Tim Northover authored Apr 10, 2013
  c6047655
Mar 20, 2013
- Fix pr13145 - Naming a function like a register name confuses the asm parser. · b162a5ca
  Chad Rosier authored Mar 19, 2013
  b162a5ca
Feb 27, 2013
- ARM: permit full range of valid ADR immediates. · 29931ab2
  Tim Northover authored Feb 27, 2013
  29931ab2
Feb 23, 2013
- ARM: Convenience aliases for 'srs*' instructions. · 9be2d715
  Jim Grosbach authored Feb 23, 2013
  9be2d715
Feb 22, 2013
- Make ARMAsmPrinter generate the correct alignment specifier syntax in instructions. · 0ba797e8
  Kristof Beyls authored Feb 22, 2013
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Feb 15, 2013
- If bundle alignment is enabled, do not add data to a fragment with instructions · 8878bcc9
  Derek Schuff authored Feb 15, 2013
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- The ARM NEON vector compare instructions take three arguments. However, the · 0f8617b1
  Joel Jones authored Feb 14, 2013
  0f8617b1