dominator information even though dominators were previously computed.

Patch by Nick Sumner.

llvm-svn: 138449

llvm-svn: 138448

Add the predicate operand to the instructions. Update the back end
accordingly where the instructions are used. Restrict the SP operands
to actually only be SP, as otherwise these break assembly parsing for the
normal instruction variants.

llvm-svn: 138445

Be stricter in enforcing IT instruction predicate values, so that we don't end up trying to print out an illegal predicate.

llvm-svn: 138443

llvm-svn: 138437

variable sized alloca.

llvm-svn: 138433

Break 256-bit vector int add/sub/mul into two 128-bit operations to avoid costly scalarization. Fixes PR10711.

llvm-svn: 138427

A value of -1 at a call site tells the personality function that this call isn't
handled by the current function. Since the ResumeInsts are converted to calls to
_Unwind_SjLj_Resume, add a (volatile) store of -1 to its 'call site'.

llvm-svn: 138416

This is not necessarily the first or dominating use of the EH values. The IR
breaks if it's not. So replace the specific value in the instruction with the
new value.

llvm-svn: 138406

The invoke could be at the end of the entry block. If it's the only one, then we
won't process all of the landingpad instructions correctly. This code is
currently ugly, but should be made much nicer once the new EH switch is thrown.

llvm-svn: 138397

permutations. Also tidy up some patterns and make them close to their
instruction definition!

llvm-svn: 138392

llvm-svn: 138387

It should go before AsmPrinter MC pseudo expansion since it's based on
MachineInstr, not MCInst. Otherwise any frame related pseudo instructions
may be missed.

llvm-svn: 138386

llvm-svn: 138373

llvm-svn: 138371

from MC.

llvm-svn: 138367

This reverts commit 20a05be15ea5271ab6185b83200fa88263362400. (svn rev 138340)

Conflicts:

	test/Transforms/InstCombine/bitcast.ll

llvm-svn: 138366

llvm-svn: 138360

llvm-svn: 138356

llvm-svn: 138354

llvm-svn: 138348

llvm-svn: 138345

llvm-svn: 138344

Fix decoding of Thumb2 prefetch instructions, which account for all the remaining Thumb2 decoding failures found by randomized testing so far.

llvm-svn: 138341

1. Cleanup the tests in ConstantFolding.cpp
2. Implement isAllOnes for Constant, ConstantFP, ConstantVector

llvm-svn: 138340

llvm-svn: 138339

There is no non-writeback store multiple instruction in Thumb1, so
don't define one. As a result load multiple is the only instantiation of
the multiclass, so refactor that away entirely.

llvm-svn: 138338

Fix two more instances of mis-matched operand names breaking disassembly.  Found by randomized testing.

llvm-svn: 138337

32-bit little-endian CPU. Used by PNaCl and Emscripten.

llvm-svn: 138335

Add support for breaking 256-bit v16i16 and v32i8 VSETCC into two 128-bit ones, avoiding sclarization. Add vex form of pcmpeqq and pcmpgtq. Fixes more cases for PR10712.

llvm-svn: 138321

llvm-svn: 138319

SSE transition penalty. The pass is enabled through the "x86-use-vzeroupper"
llc command line option. This is only the first step (very naive and
conservative one) to sketch out the idea, but proper DFA is coming next
to allow smarter decisions. Comments and ideas now and in further commits
will be very appreciated.

llvm-svn: 138317

llvm-svn: 138311

llvm-svn: 138308

llvm-svn: 138306

value, we insert a load of the exception object and selector object from memory,
which is where it actually resides. If it's used by a PHI node, we follow that
to where it is being used. Eventually, all landingpad instructions should have
no uses. Any PHI nodes that were associated with those landingpads should be
removed.

llvm-svn: 138302

llvm-svn: 138301

llvm-svn: 138300

llvm-svn: 138299

llvm-svn: 138298