isel'ing value preserving FP roundings from one fp stack reg to another
into a noop, instead of stack traffic.

llvm-svn: 48093

llvm-svn: 48092

llvm-svn: 48091

into a vector of zeros or undef, and when the top part is obviously
zero, we can just use movd + shuffle.  This allows us to compile
vec_set-B.ll into:

_test3:
	movl	$1234567, %eax
	andl	4(%esp), %eax
	movd	%eax, %xmm0
	ret

instead of:

_test3:
	subl	$28, %esp
	movl	$1234567, %eax
	andl	32(%esp), %eax
	movl	%eax, (%esp)
	movl	$0, 4(%esp)
	movq	(%esp), %xmm0
	addl	$28, %esp
	ret

llvm-svn: 48090

llvm-svn: 48089

and also update the cloning interface's major user, the loop optimizations.

llvm-svn: 48088

we weren't processing a statement within a basic block.

llvm-svn: 48087

llvm-svn: 48086

Add the ability to remove just one instance of a BB from a phi node. This fixes
the compile error in the tree now.

llvm-svn: 48085

removal of invoke, PR1269.

llvm-svn: 48084

llvm-svn: 48083

llvm-svn: 48082

llvm-svn: 48081

llvm-svn: 48080

Bug fix: Don't call RemoveDeadBindings more than once (can kill newly generated values to Block-Level Expressions).

llvm-svn: 48079

Rename Directives.cpp -> PPDirectives.cpp since it implements part of the
Preprocessor class.

llvm-svn: 48078

instructions.

llvm-svn: 48077

llvm-svn: 48076

MacroArgs.cpp/h

llvm-svn: 48075

llvm-svn: 48074

llvm-svn: 48073

llvm-svn: 48072

token streams and macro lexing, so a more generic name is useful.

llvm-svn: 48071

involved.

llvm-svn: 48070

llvm-svn: 48069

llvm-svn: 48068

llvm-svn: 48067

llvm-svn: 48066

llvm-svn: 48065

llvm-svn: 48064

#include <xmmintrin.h>
__m128i doload64(short x) {return _mm_set_epi16(0,0,0,0,0,0,0,1);}

into:
	movl	$1, %eax
	movd	%eax, %xmm0
	ret

instead of a constant pool load.

llvm-svn: 48063

llvm-svn: 48062

llvm-svn: 48061

of BUILD_VECTORS that only have two unique elements:

1. The previous code was nondeterminstic, because it walked a map in
   SDOperand order, which isn't determinstic.
2. The previous code didn't handle the case when one element was undef
   very well.  Now we ensure that the generated shuffle mask has the
   undef vector on the RHS (instead of potentially being on the LHS)
   and that any elements that refer to it are themselves undef.  This
   allows us to compile CodeGen/X86/vec_set-9.ll into:

_test3:
	movd	%rdi, %xmm0
	punpcklqdq	%xmm0, %xmm0
	ret

instead of:

_test3:
	movd	%rdi, %xmm1
	#IMPLICIT_DEF %xmm0
	punpcklqdq	%xmm1, %xmm0
	ret

... saving a register.

llvm-svn: 48060

_test3:
	movd	%rdi, %xmm1
	#IMPLICIT_DEF %xmm0
	punpcklqdq	%xmm1, %xmm0
	ret

instead of:

_test3:
	#IMPLICIT_DEF %rax
	movd	%rax, %xmm0
	movd	%rdi, %xmm1
	punpcklqdq	%xmm1, %xmm0
	ret

This is still not ideal.  There is no reason to two xmm regs.

llvm-svn: 48058

2) Don't try to insert an i64 value into the low part of a 
   vector with movq on an x86-32 target.  This allows us to 
   compile:

__m128i doload64(short x) {return _mm_set_epi16(0,0,0,0,0,0,0,1);}

into:

_doload64:
	movaps	LCPI1_0, %xmm0
	ret

instead of:

_doload64:
	subl	$28, %esp
	movl	$0, 4(%esp)
	movl	$1, (%esp)
	movq	(%esp), %xmm0
	addl	$28, %esp
	ret

llvm-svn: 48057

SCALAR_TO_VECTOR on paths that end up not using it.

llvm-svn: 48056

llvm-svn: 48055

llvm-svn: 48054

llvm-svn: 48053