llvm-svn: 6622

llvm-svn: 6620

Special cases: STFSRx and STXFSRx - they operate on predefined rd=0 or rd=1, and
expect %fsr as the parameter in assembly. They are disabled (since not used)
until an encoding, both for code generation and output, is chosen.

llvm-svn: 6619

llvm-svn: 6618

 Update file comment to contain a bunch of the overview mapping-info
  documentation previously buried within the file.
 Remove some unnecessary include/using stmts.
 Rename pass to MappingInfoCollector.
 Rewrite a lot of it so it doesn't use global instance variables and so
  it outputs into MappingInfo objects and then dumps those out, instead of going
  straight to an assembly file.
 Change name of factory to getMappingInfoCollector.
 Fold prologue & epilogue writers into MappingInfo methods.

lib/Target/Sparc/FInfo.cpp:
 Correct file comment to reflect above change

lib/Target/Sparc/Sparc.cpp:
 Change name of factory to getMappingInfoCollector.

llvm-svn: 6617

to reflect file's current location.  Add definition of class
MappingInfo.

llvm-svn: 6616

sorry dude

llvm-svn: 6615

undeclared. I was not sure what Brian wanted, so I will let him fix this. But now it compiles.

llvm-svn: 6614

llvm-svn: 6613

  in Emitter.cpp, just convert the Sparc version of the constant pool into
  what's already supported and inter-operate.
* Implemented a first pass at lazy function resolution in the JITResolver. That
  required adding a SparcV9CodeEmitter pointer to simplify generating
  bit-patterns of the instructions.
* SparcV9CodeEmitter now creates and destroys static TheJITResolver, which makes
  sense because the SparcV9CodeEmitter is the only user of TheJITResolver, and
  lives for the entire duration of the JIT (via PassManager which lives in VM).
* Changed all return values in the JITResolver to uint64_t because of the 64-bit
  Sparc architecture.
* Added a new version of getting the value of a GlobalValue in the
  SparcV9CodeEmitter, which now works for already-generated functions (JITted or
  library functions).
* Removed little-used and unused functions, cleaning up the internal view of the
  SparcV9CodeEmitter.

llvm-svn: 6612

  laid out closer to the VM so that calls to library functions (e.g. puts()) and
  callback (e.g.  JITResolver::CompilationCallback) fit into 30 bits of the call
  instruction.
* Abort if architecture is not yet supported (not X86 or Sparc) because it
  likely requires a different set of parameters to mmap() .
* Stop using hard-coded values for page size; use sysconf(_SC_PAGESIZE) instead.

llvm-svn: 6610

llvm-svn: 6609

llvm-svn: 6606

Add new combination to turn seteq X, 0 -> not(cast X to bool)

llvm-svn: 6604

the loop, and in both cases. In the first case, it is a VReg that is a constant
so it may be actually converted to a constant. In the second case, it is already
a constant, but then if it doesn't change its type (e.g. to become a register
and have the value loaded from memory if it is too large to live in its
instruction field), we must change the opcode BEFORE the 'continue', otherwise
we miss the opportunity.

llvm-svn: 6602

llvm-svn: 6601

llvm-svn: 6599

llvm-svn: 6597

no sense.

llvm-svn: 6595

llvm-svn: 6594

llvm-svn: 6593

currently-running process.

llvm-svn: 6592

llvm-svn: 6591

llvm-svn: 6590

llvm-svn: 6589

llvm-svn: 6583

llvm-svn: 6581

rewriting it.  I also vacuumed out all the commented-out code and
inaccurate comments, etc.

(We need to put the mapping information in a data structure so that we can
pass it out to the JIT, instead of automagically converting it to .byte
directives.)

llvm-svn: 6574

llvm-svn: 6572

llvm-svn: 6568

llvm-svn: 6567

* Stop code from wrapping to the next line.

llvm-svn: 6566

llvm-svn: 6565

they prefer the destination register to be last. Thus, two new classes were made
for them that accomodate for having this layout of operands (F3_1rd, F3_2rd).

llvm-svn: 6564

llvm-svn: 6563

* Labeled sections that are not currently used in the Sparc backend as not
  requiring completion at this time.

llvm-svn: 6562

* Added instruction classes which start building from rs1, then rs2, and rd.
* Fixed order of operands in classes 4.1 and 4.2; added 4.6 .

llvm-svn: 6561

* Added new classes which start building from rs1, adding rs2, and then rd.
* Fixed order of operands in classes 3.11, 3.12, 3.16, and 3.17 .
* Fixed comments to reflect Real Life (tm).
* Removed "don't care" commented out assignments and dead classes (#if 0).

llvm-svn: 6560

llvm-svn: 6559

llvm-svn: 6554