llvm-svn: 86400

(eliminating some extends) if the new type of the
computation is legal or if both the source and dest
are illegal.  This prevents instcombine from changing big
chains of computation into i64 on 32-bit targets for 
example.

llvm-svn: 86398

Please verify.

llvm-svn: 86397

llvm-gcc-i386-darwin9 build bot.

llvm-svn: 86391

llvm-svn: 86386

llvm-svn: 86385

llvm-svn: 86384

llvm-svn: 86383

llvm-svn: 86382

llvm-svn: 86381

llvm-svn: 86380

llvm-svn: 86379

Add assert in asmprinter to catch such cases and xfail the tests.
PR is to be filled.

llvm-svn: 86375

datatypes on a given CPU.  This is intended to allow instcombine and other
transformations to avoid converting big sequences of operations to an
inconvenient width, and will help clean up after SRoA.  See also "Adding 
legal integer sizes to TargetData" on Feb 1, 2009 on llvmdev, and PR3451.

Comments welcome.

llvm-svn: 86370

llvm-svn: 86369

llvm-svn: 86367

llvm-svn: 86366

llvm-svn: 86365

MachineRelocations, "stub" always refers to a far-call stub or a
load-a-faraway-global stub, so this patch adds "Far" to the term. (Other stubs
are used for lazy compilation and dlsym address replacement.) The variable was
also inconsistent between the positive and negative sense, and the positive
sense ("NeedStub") was more demanding than is accurate (since a nearby-enough
function can be called directly even if the platform often requires a stub).
Since the negative sense causes double-negatives, I switched to
"MayNeedFarStub" globally.

llvm-svn: 86363

of movhps as the constraint.  Changes optimizations so
update testcases as appropriate as well.

llvm-svn: 86360

a store.

llvm-svn: 86359

(making pred factoring only happen if threading is guaranteed
to be successful).

This now survives an X86-64 bootstrap of llvm-gcc.

llvm-svn: 86355

llvm-svn: 86354

things. Back out part of r86349 for a moment.

llvm-svn: 86353

and add a .ll to demo the new capability.

llvm-svn: 86349

llvm-svn: 86348

llvm-svn: 86347

llvm-svn: 86342

llvm-svn: 86340

llvm-svn: 86332

llvm-svn: 86330

  except it doesn't care if the definitions' virtual registers differ. This is
  used by machine LICM and other MI passes to perform CSE.
- Teach Thumb2InstrInfo::isIdentical() to check two t2LDRpci_pic are identical.
  Since pc relative constantpool entries are always different, this requires it
  it check if the values can actually the same.

llvm-svn: 86328

llvm-svn: 86325

Add code to check at SelectionDAGISel::LowerArguments time to see if return values can be lowered to registers.  Coming soon, code to perform sret-demotion if return values cannot be lowered to registers

llvm-svn: 86324

A non-identity copy cannot be coalesced when the phi join destination register
is live at the copy site.

Also verify the condition that the PHI join source register is only used in
the PHI join. Otherwise the coalescing is invalid.

llvm-svn: 86322

86289, 86278, 86270, 86267, 86266 & 86264
Chris, please take a look.

llvm-svn: 86321

was wrong and too aggressive in the sense that DPSoRegFrm includes both constant
shifts (with Inst{4} = 0) and register controlled shifts (with Inst{4} = 1 and
Inst{7} = 0).  The 'rr' fragment of the multiclass definitions actually means
register/register with no shift, see A8-11.

llvm-svn: 86319

- fix ProcessInternalGlobal() debug output

llvm-svn: 86317

llvm-svn: 86316

llvm-svn: 86314