llvm-svn: 40775

llvm-svn: 40774

llvm-svn: 40772

like this:

typedef __attribute__(( ocu_vector_type(4) )) float float4;
float4 test1(float4 V) {
  return V.wzyx+V;
}

to:
_test1:
        pshufd  $27, %xmm0, %xmm1
        addps   %xmm0, %xmm1
        movaps  %xmm1, %xmm0
        ret

and:

_test1:
        mfspr r2, 256
        oris r3, r2, 4096
        mtspr 256, r3
        li r3, lo16(LCPI1_0)
        lis r4, ha16(LCPI1_0)
        lvx v3, r4, r3
        vperm v3, v2, v2, v3
        vaddfp v2, v3, v2
        mtspr 256, r2
        blr 

llvm-svn: 40771

We can now codegen:

  vec4.xy;

as nothing!

llvm-svn: 40769

llvm-svn: 40768

llvm-svn: 40766

llvm-svn: 40765

llvm-svn: 40764

llvm-svn: 40763

llvm-svn: 40762

llvm-svn: 40761

llvm-svn: 40760

llvm-svn: 40759

llvm-svn: 40758

llvm-svn: 40757

Generalize isPSHUFDMask and add a unary SHUFPD pattern so that SHUFPD's
memory operand alignment can be tested as well, with a fix to avoid
breaking MMX's use of isPSHUFDMask.

llvm-svn: 40756

llvm-svn: 40754

llvm-svn: 40751

llvm-svn: 40750

llvm-svn: 40749

llvm-svn: 40748

llvm-svn: 40746

llvm-svn: 40745

llvm-svn: 40743

casts in the input.

llvm-svn: 40741

llvm-svn: 40740

llvm-svn: 40739

gvn, gvnpre, dse, and predsimplify.  To see these, use:

  make check-line-length

llvm-svn: 40738

exit edge to preserve LCSSA.

Fix dominance frontier update during loop unswitch. This fixes PR 1589, again

llvm-svn: 40737

X86InstrInfo::isReallyTriviallyReMaterializable knows how to handle
with the isReMaterializable flag so that it is given a chance to handle
them. Without hoisting constant-pool loads from loops this isn't very
visible, though it does keep CodeGen/X86/constant-pool-remat-0.ll from
making a copy of the constant pool on the stack.

llvm-svn: 40736

llvm-svn: 40734

llvm-svn: 40733

llvm-svn: 40732

operations of casts.  This implements InstCombine/zext-fold.ll

llvm-svn: 40726

llvm-svn: 40725

Add extend and extOrTrunc methods that do sign or zero extension depending on whether the integer is signed or not

llvm-svn: 40724

llvm-svn: 40723

llvm-svn: 40722

llvm-svn: 40721