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  1. May 04, 2013
  2. May 03, 2013
    • Bill Wendling's avatar
      67758579
    • Wei Pan's avatar
      · c4c76d1b
      Wei Pan authored
      Test commit
      
      llvm-svn: 181057
      c4c76d1b
    • Adrian Prantl's avatar
      Reapply r180982 with repaired logic and an additional testcase. · 52bf3c4c
      Adrian Prantl authored
      Un-break the gdb buildbot.
      - Use the debug location of the return expression for the cleanup code
        if the return expression is trivially evaluatable, regardless of the
        number of stop points in the function.
      - Ensure that any EH code in the cleanup still gets the line number of
        the closing } of the lexical scope.
      - Added a testcase with EH in the cleanup.
      
      rdar://problem/13442648
      
      llvm-svn: 181056
      52bf3c4c
    • Ashok Thirumurthi's avatar
      Refactoring for struct UserArea: · d36712df
      Ashok Thirumurthi authored
      - Decouples RegisterContext_x86_64 from UserArea.
      - Restores the original definition of UserArea so that it can be used to generate offsets for use with ptrace.
      - Moves UserArea to the 64-bit Linux specialization.
      
      - Also fixes an off-by-one error for the size of m_gpr.
      - Also adds a TODO comment noting the need for a mechanism to identify the correct plugin based on the target OS (and architecture).
      
      Reviewed by: Matt Kopec and Samuel Jacob
      
      llvm-svn: 181055
      d36712df
    • Ulrich Weigand's avatar
      · b9d5d073
      Ulrich Weigand authored
      [PowerPC] Avoid using '$' in generated assembler code
      
      PowerPC assemblers are supposed to support a stand-alone '$' symbol
      as an alternative of '.' to refer to the current PC.  This does not
      work in the LLVM assembler parser yet.
      
      To avoid bootstrap failures when using the LLVM assembler as system
      assembler, this patch modifies the assembler source code generated
      by LLVM to avoid using '$' (and simply use '.' instead).
      
      llvm-svn: 181054
      b9d5d073
    • Ulrich Weigand's avatar
      · 2c3a219b
      Ulrich Weigand authored
      [PowerPC] Parse platform-specifc variant kinds in AsmParser
      
      This patch adds support for PowerPC platform-specific variant
      kinds in MCSymbolRefExpr::getVariantKindForName, and also
      adds a test case to verify they are translated to the appropriate
      fixup type.
      
      llvm-svn: 181053
      2c3a219b
    • Ulrich Weigand's avatar
      · 300b6875
      Ulrich Weigand authored
      [PowerPC] Add some Book II instructions to AsmParser
      
      This patch adds a couple of Book II instructions (isync, icbi) to the
      PowerPC assembler parser.  These are needed when bootstrapping clang
      with the integrated assembler forced on, because they are used in
      inline asm statements in the code base.
      
      The test case adds the full list of Book II storage control instructions,
      including associated extended mnemonics.  Again, those that are not yet
      supported as marked as FIXME.
      
      llvm-svn: 181052
      300b6875
    • Ulrich Weigand's avatar
      · d839490f
      Ulrich Weigand authored
      [PowerPC] Support extended mnemonics in AsmParser
      
      This patch adds infrastructure to support extended mnemonics in the
      PowerPC assembler parser.  It adds support specifically for those
      extended mnemonics that LLVM will itself generate.
      
      The test case lists *all* extended mnemonics according to the
      PowerPC ISA v2.06 Book I, but marks those not yet supported
      as FIXME.
      
      llvm-svn: 181051
      d839490f
    • Ulrich Weigand's avatar
      · 640192da
      Ulrich Weigand authored
      [PowerPC] Add assembler parser
      
      This adds assembler parser support to the PowerPC back end.
      
      The parser will run for any powerpc-*-* and powerpc64-*-* triples,
      but was tested only on 64-bit Linux.  The supported syntax is
      intended to be compatible with the GNU assembler.
      
      The parser does not yet support all PowerPC instructions, but
      it does support anything that is generated by LLVM itself.
      There is no support for testing restricted instruction sets yet,
      i.e. the parser will always accept any instructions it knows,
      no matter what feature flags are given.
      
      Instruction operands will be checked for validity and errors
      generated.  (Error handling in general could still be improved.)
      
      The patch adds a number of test cases to verify instruction
      and operand encodings.  The tests currently cover all instructions
      from the following PowerPC ISA v2.06 Book I facilities:
      Branch, Fixed-point, Floating-Point, and Vector. 
      Note that a number of these instructions are not yet supported
      by the back end; they are marked with FIXME.
      
      A number of follow-on check-ins will add extra features.  When
      they are all included, LLVM passes all tests (including bootstrap)
      when using clang -cc1as as the system assembler.
      
      llvm-svn: 181050
      640192da
    • Andrew Kaylor's avatar
      Fix logic error in ProcessInfo::SetArg0 · 3a8625dd
      Andrew Kaylor authored
      llvm-svn: 181049
      3a8625dd
    • Ben Langmuir's avatar
      Serialization for captured statements · ce914fc8
      Ben Langmuir authored
      Add serialization for captured statements and captured decls.  Also add
      a const_capture_iterator to CapturedStmt.
      
      Test contributed by Wei Pan
      
      Differential Revision: http://llvm-reviews.chandlerc.com/D727
      
      llvm-svn: 181048
      ce914fc8
    • Shuxin Yang's avatar
      Decompose GVN::processNonLocalLoad() (about 400 LOC) into smaller helper... · 637b9beb
      Shuxin Yang authored
      Decompose GVN::processNonLocalLoad() (about 400 LOC) into smaller helper functions. No function change. 
      
      This function consists of following steps:
         1. Collect dependent memory accesses.
         2. Analyze availability.
         3. Perform fully redundancy elimination, or 
         4. Perform PRE, depending on the availability
      
       Step 2, 3 and 4 are now moved to three helper routines.
      
      llvm-svn: 181047
      637b9beb
    • Richard Smith's avatar
      PR15906: The body of a lambda is not an evaluated subexpression; don't visit... · fa11fd66
      Richard Smith authored
      PR15906: The body of a lambda is not an evaluated subexpression; don't visit it when visiting such subexpressions.
      
      llvm-svn: 181046
      fa11fd66
    • Enrico Granata's avatar
      Harden against potential empty nodes in the map · 4ffff279
      Enrico Granata authored
      llvm-svn: 181045
      4ffff279
    • Enrico Granata's avatar
      <rdar://problem/13749871> · d03a273b
      Enrico Granata authored
      Improvements to the std::map data formatter to recognize when invalid memory is being explored and bail out instead of looping for a potentially very long time
      
      llvm-svn: 181044
      d03a273b
    • Ben Langmuir's avatar
      Move CapturedStmt parameters to CapturedDecl · 37943a7a
      Ben Langmuir authored
      Move the creation of CapturedStmt parameters out of CodeGen and into
      Sema, making it easier to customize the outlined function. The
      ImplicitParamDecls are stored in the CapturedDecl using an
      ASTContext-allocated array.
      
      Differential Revision: http://llvm-reviews.chandlerc.com/D722
      
      llvm-svn: 181043
      37943a7a
    • Douglas Gregor's avatar
      Restore Richard's belief in me. · 231ca1c9
      Douglas Gregor authored
      llvm-svn: 181042
      231ca1c9
    • Akira Hatanaka's avatar
      [mips] Split the DSP control register and define one register for each field of · e86bd4f6
      Akira Hatanaka authored
      its fields.
      
      This removes false dependencies between DSP instructions which access different
      fields of the the control register. Implicit register operands are added to
      instructions RDDSP and WRDSP after instruction selection, depending on the
      value of the mask operand.
      
      llvm-svn: 181041
      e86bd4f6
    • Ted Kremenek's avatar
      [analyzer] Start hacking up alternate control-flow edge generation. WIP. Not... · acf99a1a
      Ted Kremenek authored
      [analyzer] Start hacking up alternate control-flow edge generation.  WIP.  Not guaranteed to do anything useful yet.
      
      llvm-svn: 181040
      acf99a1a
    • Argyrios Kyrtzidis's avatar
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