Commits · d97c100dc456b7e1222ab2e0ddf233a09bbf627c · Roger Ferrer / llvm-epi-0.8 · GitLab

This project is archived. Its data is read-only.

Dec 01, 2015
- Replace all weight-based interfaces in MBB with probability-based interfaces,... · d97c100d
  Cong Hou authored Dec 01, 2015
  d97c100d
- Revert r254348: "Replace all weight-based interfaces in MBB with... · 1dbaf675
  Hans Wennborg authored Dec 01, 2015
  1dbaf675
- Squelch unused variable warning in SIRegisterInfo.cpp. · 456fdfcd
  Matt Arsenault authored Dec 01, 2015
  456fdfcd
- Replace all weight-based interfaces in MBB with probability-based interfaces,... · fa1917c6
  Cong Hou authored Dec 01, 2015
  fa1917c6
Nov 30, 2015
- [X86][FMA4] Prefer FMA4 to FMA · db26b3dd
  Simon Pilgrim authored Nov 30, 2015
  db26b3dd
- AMDGPU: Fix unused function · ada6cf1b
  Matt Arsenault authored Nov 30, 2015
  ada6cf1b
- AMDGPU: Error if too many user SGPRs used · 41003af2
  Matt Arsenault authored Nov 30, 2015
  41003af2
- AMDGPU: Rework how private buffer passed for HSA · 26f8f3db
  Matt Arsenault authored Nov 30, 2015
  26f8f3db
- AMDGPU: Rename enums to be consistent with HSA code object terminology · ac234b60
  Matt Arsenault authored Nov 30, 2015
  ac234b60
- AMDGPU: Remove SIPrepareScratchRegs · 0e3d3893
  Matt Arsenault authored Nov 30, 2015
  0e3d3893
- AMDGPU: Use assert zext for workgroup sizes · ff6da2fe
  Matt Arsenault authored Nov 30, 2015
  ff6da2fe
- [ARM] For old thumb ISA like v4t, we cannot use PC directly in pop. · cdad10f3
  Quentin Colombet authored Nov 30, 2015
  cdad10f3
- [X86] Add RIP to GR64_TCW64 · bf4119fa
  David Majnemer authored Nov 30, 2015
  bf4119fa
- Enable shrink wrapping for PPC64 · f4ce2f3a
  Kit Barton authored Nov 30, 2015
  f4ce2f3a
- [WebAssembly] Fix a few minor compiler warnings. NFC. · 96029f78
  Dan Gohman authored Nov 30, 2015
  96029f78
- fix formatting; NFC · 239be1fb
  Sanjay Patel authored Nov 30, 2015
  239be1fb
- [Hexagon] NFC Reordering headers. · e6241798
  Colin LeMahieu authored Nov 30, 2015
  e6241798
- AMDGPU: Don't reserve SCRATCH_PTR input register · ea03cf2f
  Matt Arsenault authored Nov 30, 2015
  ea03cf2f
- Silencing a 32-bit to 64-bit implicit conversion warning; NFC. · 33c95f08
  Aaron Ballman authored Nov 30, 2015
  33c95f08
- [mips][microMIPS] Implement LBUX, LHX, LWX, MAQ_S[A].W.PHL, MAQ_S[A].W.PHR,... · c03957f0
  Hrvoje Varga authored Nov 30, 2015
  c03957f0
- [mips][microMIPS] Fix issue with offset operand of BALC and BC instructions · a887b361
  Zoran Jovanovic authored Nov 30, 2015
  a887b361
- [mips][microMIPS] Implement PRECR.QB.PH, PRECR_SRA[_R].PH.W, PRECRQ.PH.W,... · 56f3b0e4
  Zlatko Buljan authored Nov 30, 2015
  56f3b0e4
- Revert r254279 "[X86] Use ArrayRef. NFC". It seems to have upset an MSVC build bot. · 27e2912f
  Craig Topper authored Nov 30, 2015
  27e2912f
- [X86] Use ArrayRef. NFC · b84f3986
  Craig Topper authored Nov 30, 2015
  b84f3986
- [AVX512] The vpermi2 instructions require an integer vector for the index... · aad5f11e
  Craig Topper authored Nov 30, 2015
  aad5f11e
- [X86] Remove duplicate entries from intrinsics tables and add asserts to... · fbde7aa1
  Craig Topper authored Nov 29, 2015
  fbde7aa1
- [WebAssembly] Delete an obsolete TODO comment. · 9551a44d
  Dan Gohman authored Nov 29, 2015
  9551a44d
Nov 29, 2015
- [WebAssembly] Set several MCInstrDesc flags. · 174b2d83
  Dan Gohman authored Nov 29, 2015
  174b2d83
- [X86] int_x86_avx2_permps and X86ISD::VPERMV should take an integer vector for its shuffle indices. · ecae476e
  Craig Topper authored Nov 29, 2015
  ecae476e
- [WebAssembly] Delete unused functions. NFC. · 5237b399
  Dan Gohman authored Nov 29, 2015
  5237b399
- [WebAssembly] Minor clang-format and selected clang-tidy cleanups. NFC. · 7a6b9825
  Dan Gohman authored Nov 29, 2015
  7a6b9825
- [X86][SSE] Added support for lowering to ADDSUBPS/ADDSUBPD with commuted inputs · 88aa627c
  Simon Pilgrim authored Nov 29, 2015
  88aa627c
- AVX512:Implemented encoding for the vmovq.s instruction. · e293e83f
  Igor Breger authored Nov 29, 2015
  e293e83f
Nov 28, 2015
- Revert "[ARM] Generate ABI_optimization_goals build attribute, as described in the ARM ARM." · 5dbc8a52
  Renato Golin authored Nov 28, 2015
  5dbc8a52
- [Stack realignment] Handling of aligned allocas. · f12b925b
  Jonas Paulsson authored Nov 28, 2015
  f12b925b
Nov 27, 2015
- Follow-up fix for r254201 · f01a59f9
  Artyom Skrobov authored Nov 27, 2015
  f01a59f9
- [ARM] Generate ABI_optimization_goals build attribute, as described in the ARM ARM. · b955b905
  Artyom Skrobov authored Nov 27, 2015
  b955b905
- [AArch64] Add ARMv8.2-A FP16 scalar instructions · b25914e0
  Oliver Stannard authored Nov 27, 2015
  b25914e0
- [X86] Pair a NoVLX with HasAVX512 to match the others and remove a unique... · e38c57a4
  Craig Topper authored Nov 27, 2015
  e38c57a4
Nov 26, 2015
- [X86] Now that X86VPermt2 is used in all the avx512_perm_t_sizes just hardcode... · a47576f2
  Craig Topper authored Nov 26, 2015
  a47576f2