llvm-svn: 136278

Fix parsing of the 's' suffix for the mnemonic. Add tests.

llvm-svn: 136277

llvm-svn: 136275

Fix parsing of the 's' suffix for the mnemonic. Add tests.

llvm-svn: 136274

llvm-svn: 136272

llvm-svn: 136269

llvm-svn: 136267

llvm-svn: 136266

Encode the width operand as it encodes in the instruction, which simplifies
the disassembler and the encoder, by using the imm1_32 operand def. Add a
diagnostic for the context-sensitive constraint that the width must be in
the range [1,32-lsb].

llvm-svn: 136264

llvm-svn: 136263

llvm-svn: 136261

llvm-svn: 136260

llvm-svn: 136259

Refactor the STRT and STRBT instructions to distinguish between the register-addend and immediate-addend versions.  Temporarily XFAIL the asm parsing tests for these instructions.

llvm-svn: 136255

This adds the new instructions 'landingpad' and 'resume'.

llvm-svn: 136253

Assembly parser handling for extend instruction rotate operands. Add tests
for the sign extend instructions.

llvm-svn: 136252

llvm-svn: 136250

X86ISD::MEMBARRIER does not require SSE2; it doesn't actually generate any code, and all x86 processors will honor the required semantics.

llvm-svn: 136249

The numbering of LLVMOpcode is supposed to be stable; revert my earlier change, and append Fence onto the end.

llvm-svn: 136245

llvm-svn: 136244

Add a generic 'capacity_in_bytes' function to allow inspection of memory usage of various data structures.

llvm-svn: 136233

llvm-svn: 136229

llvm-svn: 136228

Refactor the rest of the extend instructions to not artificially distinguish
between a rotate of zero and a rotate of any other value. Replace the by-zero
versions with Pat<>'s for ISel.

llvm-svn: 136226

Refactor the SXTB, SXTH, SXTB16, UXTB, UXTH, and UXTB16 instructions to not
have an 'r' and an 'r_rot' version, but just a single version with a rotate
that can be zero. Use plain Pat<>'s for the ISel of the non-rotated version.

llvm-svn: 136225

llvm-svn: 136222

llvm-svn: 136221

llvm-svn: 136219

llvm-svn: 136218

llvm-svn: 136215

to print STL containers.

llvm-svn: 136213

llvm-svn: 136212

C++0x.

llvm-svn: 136211

llvm-svn: 136206

llvm-svn: 136205

llvm-svn: 136202

llvm-svn: 136201

usage of the shuffle bitmask. Both work in 128-bit lanes without
crossing, but in the former the mask of the high part is the same
used by the low part while in the later both lanes have independent
masks. Handle this properly and and add support for vpermilpd.

llvm-svn: 136200

llvm-svn: 136199

Fix AliasSetTracker so that it doesn't make any assumptions about instructions it doesn't know about (like the atomic instructions I'm adding).

llvm-svn: 136198