llvm-svn: 96990

of the block descriptor field.  This field is the ObjC style @encode
signature of the implementation function, and was to this point
conditionally provided in the block literal data structure.  That
provisional support is removed.

Additionally, eliminate unused enumerations for the block literal flags field.
The first shipping ABI unconditionally set (1<<29) but this bit is unused
by the runtime, so the second ABI will unconditionally have (1<<30) set so
that the runtime can in fact distinguish whether the additional data is
present or not.

llvm-svn: 96989

With the compiler changed to use EmitCodeAlignment() it does change the
functionality.  But X86 assembly code assembled with llvm-mc does not change
its output.  For that we will eventually change the assembler frontend to
detect a '.align x, 0x90' when used in a section that 'hasInstructions' and use
EmitCodeAlignment, but will wait until we have better target hooks.

llvm-svn: 96988

rewriting problem. Fixes radar 7680953.

llvm-svn: 96987

pointer (for defensive programming).  This matches the behavior with
assigning NULL to a regular pointer.  Fixes <rdar://problem/7631278>.

llvm-svn: 96985

llvm-svn: 96983

llvm-svn: 96981

three or four registers and VLD2 (multiple two-element structures) which loads
memory into two double-spaced registers.

A8.6.307 & A8.6.310

llvm-svn: 96980

llvm-svn: 96978

llvm-svn: 96977

that refer to an undefined class.

llvm-svn: 96976

llvm-svn: 96975

disables load folding at -O0.

llvm-svn: 96973

no id's would cause early exit allowing IsLegalToFold to return true
instead of false, producing a cyclic dag.

This was striking the new isel because it isn't using SelectNodeTo yet,
which theoretically is just an optimization.

llvm-svn: 96972

llvm-svn: 96971

the result is integral.  Fixes <rdar://problem/7676608>.

llvm-svn: 96970

The MicroBlaze is a highly configurable 32-bit soft-microprocessor for
use on Xilinx FPGAs. For more information see:
http://www.xilinx.com/tools/microblaze.htm
http://en.wikipedia.org/wiki/MicroBlaze

The current LLVM MicroBlaze backend generates assembly which can be
compiled using the an appropriate binutils assembler.

llvm-svn: 96969

llvm-svn: 96968

segment.

llvm-svn: 96967

so that it doesn't break them when the code generator starts using it.

llvm-svn: 96966

llvm-svn: 96965

llvm-svn: 96964

to be aligned with optimal nops.  This patch does not change any functionality
and when the compiler is changed to use EmitCodeAlignment() it should also not
change the resulting output.  Once the compiler change is made and everything
looks good the next patch with the table of optimal X86 nops will be added to
WriteNopData() changing the output.  There are many FIXMEs in this patch which
will be removed when we have better target hooks (coming soon I hear).

llvm-svn: 96963

llvm-svn: 96962

llvm-svn: 96961

llvm-svn: 96960

the examples shared to make sure the shared library keeps working.

llvm-svn: 96959

llvm-svn: 96958

Speed up cycle checking significantly by caching results.

llvm-svn: 96956

handle NaN properly.

Do (X une Y) ? X : Y  -> X if one of X and Y is not zero.

llvm-svn: 96955

llvm-svn: 96954

getelementptr. Despite only doing so in the case where x is a known
array object and c can be converted to an index within range, this
could still be invalid if c is actually the address of an object
allocated outside of LLVM. Also, SCEVExpander, the original motivation
for this code, has since been improved to avoid inttoptr+ptroint in
more cases.

llvm-svn: 96950

x86 and x86_64 on UNIX systems. Only OS X 10.6.2 (x86_64) and 32bit CentOS 5.2
with gcc 4.1.2 were tested. ARM UNIX build triggered failure motivating this
modification, as it seems that the ARM ABI does not support _Unwind_GetIP(...),
_Unwind_SetGR(...), and _Unwind_SetIP(...). From doing a quick browse of:
http://infocenter.arm.com/help/topic/com.arm.doc.ihi0038a/IHI0038A_ehabi.pdf,
it seems as if all other exception related apis are supported. Looks like
the port can be done to ARM. Thanks to Xerxes Rånby <xerxes@zafena.se> for
pointing out this error.

llvm-svn: 96949

llvm-svn: 96948

llvm-svn: 96944

llvm-svn: 96943

llvm-svn: 96942

llvm-svn: 96941

llvm-svn: 96938

llvm-svn: 96936