function symbol name instead of a codegen-assigned function
number.

Thanks Evan! :-)

llvm-svn: 42908

llvm-svn: 42907

is a scalar integer.

llvm-svn: 42906

llvm-svn: 42905

llvm-svn: 42904

llvm-svn: 42903

(almost) a register copy. However, it always coalesced to the register of the
RHS (the super-register). All uses of the result of a EXTRACT_SUBREG are sub-
register uses which adds subtle complications to load folding, spiller rewrite,
etc.

llvm-svn: 42899

llvm-svn: 42898

llvm-svn: 42895

llvm-svn: 42894

llvm-svn: 42892

Fix DecomposeSimpleLinearExpr to handle simple constants better.
Don't nuke gep(bitcast(allocation)) if the bitcast(allocation) will
fold the allocation.  This fixes PR1728 and Instcombine/malloc3.ll

llvm-svn: 42891

llvm-svn: 42888

may be overloaded with vector types. And add a testcase for codegen for
these.

llvm-svn: 42885

Factor out the code that expands the "nasty scalar code" for unrolling
vectors into a separate routine, teach it how to handle mixed
vector/scalar operands, as seen in powi, and use it for several operators,
including sin, cos, powi, and pow.

Add support in SplitVectorOp for fpow, fpowi and for several unary
operators.

llvm-svn: 42884

Make ppc long double constants print.

llvm-svn: 42882

llvm-svn: 42881

llvm-svn: 42880

llvm-svn: 42879

llvm-svn: 42874

return NULL.

llvm-svn: 42871

enabled by passing -tailcallopt to llc.  The optimization is
performed if the following conditions are satisfied:
* caller/callee are fastcc
* elf/pic is disabled OR
  elf/pic enabled + callee is in module + callee has
  visibility protected or hidden

llvm-svn: 42870

No compile-time support for constant operations yet,
just format transformations.  Make readers and
writers work.  Split constants into 2 doubles in
Legalize.

llvm-svn: 42865

llvm-svn: 42864

illegal.  Thanks to gabor for pointing this out!

llvm-svn: 42832

llvm-svn: 42824

Surprisingly complicated.
Adds getTargetNode for 2 outputs, no inputs (missing).

llvm-svn: 42822

llvm-svn: 42821

Fix an extremely stupid bug that prevented first round of coalescing (physical registers only) from happening.

llvm-svn: 42820

llvm-svn: 42815

Do not walk invalid iterator.

llvm-svn: 42812

llvm-svn: 42788

llvm-svn: 42787

llvm-svn: 42786

llvm-svn: 42785

llvm-svn: 42783

llvm-svn: 42781

llvm-svn: 42780

- Added a function to hold the stack location 
  where GP must be stored during LowerCALL
- AsmPrinter now emits directives based on
  relocation type
- PIC_ set to default relocation type (same as GCC)

llvm-svn: 42779

- Modified instruction format to handle pseudo instructions
- Added LoadAddr SDNode to load symbols.

llvm-svn: 42778