Commits · dc436f95d2494951d9a8763f7146cf9be8de385e · Roger Ferrer / llvm-epi-0.8

Nov 30, 2011
- make asan work at -O0, llvm part. Patch by glider@google.com · dc436f95
  Kostya Serebryany authored Nov 30, 2011
```
llvm-svn: 145530
```
  dc436f95
- Support for encoding all FMA4 instructions and tablegen patterns for all · 9430e284
  Jan Sjödin authored Nov 30, 2011
```
remaining FMA4 instructions and intrinsics with tests.

llvm-svn: 145525
```
  9430e284
- Make GlobalMerge honor the preferred alignment on globals without an... · 6cff9df2
  Eli Friedman authored Nov 30, 2011
```
Make GlobalMerge honor the preferred alignment on globals without an explicitly specified alignment.

<rdar://problem/10497732>.

llvm-svn: 145523
```
  6cff9df2
- More cleanups. No content change. · ad8b58b2
  Bill Wendling authored Nov 30, 2011
```
llvm-svn: 145522
```
  ad8b58b2
- Minor cleanup. No content change. · b6c22206
  Bill Wendling authored Nov 30, 2011
```
llvm-svn: 145521
```
  b6c22206
- Remove the install-clang-c makefile target. · a0c69014
  Bob Wilson authored Nov 30, 2011
```
When I did this before it broke a buildbot that was testing that target, but
we've removed that buildbot now.

llvm-svn: 145519
```
  a0c69014
- Remove an XXX which hasn't been fixed yet. It's too late now. · 3eb84cc7
  Bill Wendling authored Nov 30, 2011
```
llvm-svn: 145518
```
  3eb84cc7
- Remove unused variable · 23c30b90
  Matt Beaumont-Gay authored Nov 30, 2011
```
llvm-svn: 145517
```
  23c30b90
- Add some tests for all-lanes VLD1 parsing. · 7d8517b1
  Jim Grosbach authored Nov 30, 2011
```
llvm-svn: 145512
```
  7d8517b1
- ARM parsing for VLD1 all lanes, with writeback. · a68c9a84
  Jim Grosbach authored Nov 30, 2011
```
llvm-svn: 145510
```
  a68c9a84
- Add a few functions to TargetLibraryInfo. · 738da252
  Chad Rosier authored Nov 30, 2011
```
llvm-svn: 145508
```
  738da252
- ARM parsing for VLD1 two register all lanes, no writeback. · 3ecf976c
  Jim Grosbach authored Nov 30, 2011
```
llvm-svn: 145504
```
  3ecf976c
- Add test arch to make it pass on non x86 targets · 0a180101
  Nadav Rotem authored Nov 30, 2011
```
llvm-svn: 145498
```
  0a180101
- X86: Turns out bulldozer also supports sse42 and lzcnt. · 5feb3dab
  Benjamin Kramer authored Nov 30, 2011
```
While at it remove the barcelona/instanbul/shanghai subtargets, they're
unsupported by GCC and look pretty broken.

llvm-svn: 145494
```
  5feb3dab
- X86: Add subtargets for AMD's bulldozer. · 981f3232
  Benjamin Kramer authored Nov 30, 2011
```
llvm-svn: 145493
```
  981f3232
- Add a tripple to the test · 66427bcc
  Nadav Rotem authored Nov 30, 2011
```
llvm-svn: 145489
```
  66427bcc
- X86: PerformOrCombine introduced a vselect node with a wrong order of... · 96923cc2
  Nadav Rotem authored Nov 30, 2011
```
X86: PerformOrCombine introduced a vselect node with a wrong order of operands. This bug was introduced when a dedicated blend sdnode was replaced with the vselect node (in 139479).

llvm-svn: 145488
```
  96923cc2
- Add instruction selection support for AVX2 horizontal add/sub instructions. · c4977ba4
  Craig Topper authored Nov 30, 2011
```
llvm-svn: 145487
```
  c4977ba4
- Mention that -O4 does result in more optimization when used with · e9adf5c8
  Duncan Sands authored Nov 30, 2011
```
-fplugin-arg-dragonegg-enable-gcc-optzns, though it usually isn't
a win.

llvm-svn: 145486
```
  e9adf5c8
- Merge VPERM2F128/VPERM2I128 ISD node types. · 0a672eaf
  Craig Topper authored Nov 30, 2011
```
llvm-svn: 145485
```
  0a672eaf
- Better test case found in duplicate PR10570. · 613c67e4
  Andrew Trick authored Nov 30, 2011
```
llvm-svn: 145484
```
  613c67e4
- Merge decoding of VPERMILPD and VPERMILPS shuffle masks. Merge X86ISD node... · bafd224c
  Craig Topper authored Nov 30, 2011
```
Merge decoding of VPERMILPD and VPERMILPS shuffle masks. Merge X86ISD node type for VPERMILPD/PS. Add instruction selection support for VINSERTI128/VEXTRACTI128.

llvm-svn: 145483
```
  bafd224c
- LSR: handle the expansion of phi operands that use postinc forms of the IV. · ceafa2c7
  Andrew Trick authored Nov 30, 2011
```
Fixes PR11431: SCEVExpander::expandAddRecExprLiterally(const llvm::SCEVAddRecExpr*): Assertion `(!isa<Instruction>(Result) || SE.DT->dominates(cast<Instruction>(Result), Builder.GetInsertPoint())) && "postinc expansion does not dominate use"' failed.

llvm-svn: 145482
```
  ceafa2c7
- Whitespace. · 385d9f6c
  Chad Rosier authored Nov 30, 2011
```
llvm-svn: 145470
```
  385d9f6c
- Alphabetize TargetLibraryInfo enum and fix doxygen comments. No functional · abba0947
  Chad Rosier authored Nov 30, 2011
```
change intended.

llvm-svn: 145468
```
  abba0947
- llvm_unreachable() is not for user diagnostics.... · f09b1c46
  Jim Grosbach authored Nov 30, 2011
```
llvm-svn: 145465
```
  f09b1c46
- ARM parsing aliases for VLD1 single register all lanes. · cd6f5e75
  Jim Grosbach authored Nov 30, 2011
```
llvm-svn: 145464
```
  cd6f5e75
- Add support for sqrt, sqrtl, and sqrtf in TargetLibraryInfo. Disable · 82e1bd8e
  Chad Rosier authored Nov 29, 2011
```
(fptrunc (sqrt (fpext x))) -> (sqrtf x) transformation if -fno-builtin is 
specified.
rdar://10466410

llvm-svn: 145460
```
  82e1bd8e
- Tidy up a bit. · 182b6a07
  Jim Grosbach authored Nov 29, 2011
```
llvm-svn: 145458
```
  182b6a07
- Add comment. · ae672f81
  Jim Grosbach authored Nov 29, 2011
```
llvm-svn: 145456
```
  ae672f81
- ARM parsing aliases for data-size suffices on VST1. · e1154eef
  Jim Grosbach authored Nov 29, 2011
```
llvm-svn: 145454
```
  e1154eef
- FileCheckize. · f50d2eaf
  Jakob Stoklund Olesen authored Nov 29, 2011
```
llvm-svn: 145452
```
  f50d2eaf
- Change names for MIPS "generic" processors defined in Mips.td to match what GNU · dc25f9f3
  Akira Hatanaka authored Nov 29, 2011
```
tools use. Patch by Simon Atanasyan.

"mips32r1" => "mips32"
"4ke" => mips32r2"
"mips64r1" => "mips64"

llvm-svn: 145451
```
  dc25f9f3
Nov 29, 2011
- ARM assembly parsing and encoding for four-register VST1. · 5ee209ce
  Jim Grosbach authored Nov 29, 2011
```
llvm-svn: 145450
```
  5ee209ce
- llvm-config: Replace with C++ version (was llvm-config-2). · 8d5cc33a
  Daniel Dunbar authored Nov 29, 2011
```
 - Reapply of r144300, with lots of fixes/migration easement in between.

llvm-svn: 145449
```
  8d5cc33a
- Add another missing pattern. llvm-gcc likes f64 but clang likes i64 so it was... · 648e48d0
  Evan Cheng authored Nov 29, 2011
```
Add another missing pattern. llvm-gcc likes f64 but clang likes i64 so it was generating poor code for some SSE builtins.

llvm-svn: 145448
```
  648e48d0
- Enable some VST1 tests and add a few more. · 2a9c4364
  Jim Grosbach authored Nov 29, 2011
```
llvm-svn: 145443
```
  2a9c4364
- ARM assembly parsing and encoding for three-register VST1. · 98d032fd
  Jim Grosbach authored Nov 29, 2011
```
llvm-svn: 145442
```
  98d032fd
- Make X86::FsFLD0SS / FsFLD0SD real pseudo-instructions. · bde32d36
  Jakob Stoklund Olesen authored Nov 29, 2011
```
Like V_SET0, these instructions are expanded by ExpandPostRA to xorps /
vxorps so they can participate in execution domain swizzling.

This also makes the AVX variants redundant.

llvm-svn: 145440
```
  bde32d36
- Potential bug in RewriteLoopBodyWithConditionConstant: use iterator should not... · 31798ef3
  Stepan Dyatkovskiy authored Nov 29, 2011
```
Potential bug in RewriteLoopBodyWithConditionConstant: use iterator should not be changed inside the uses enumeration loop.

llvm-svn: 145432
```
  31798ef3