- Sep 24, 2013
-
-
Yunzhong Gao authored
Adding TBM feature to bdver2 processor; piledriver supports this instruction set according to the following document: http://developer.amd.com/wordpress/media/2012/10/New-Bulldozer-and-Piledriver-Instructions.pdf Phabricator code review is located here: http://llvm-reviews.chandlerc.com/D1692 llvm-svn: 191324
-
Hans Wennborg authored
We were previously mostly passing it through, but -O0 and -O3 are not valid options to cl.exe. We should translate -O0 to /Od and -O3 to /Ox. -O{1,2,s} get passed through. llvm-svn: 191323
-
Edwin Vane authored
Options that leak from other parts of LLVM are now pruned out of -help. -version output is specific to clang-apply-replacements now. Differential Revision: http://llvm-reviews.chandlerc.com/D1747 llvm-svn: 191322
-
Ashok Thirumurthi authored
llvm-svn: 191321
-
Rui Ueyama authored
llvm-svn: 191320
-
Benjamin Kramer authored
This code isn't ready to deal with allocation functions where the return is not the allocated pointer. The checks below will reject posix_memalign anyways. llvm-svn: 191319
-
Roman Divacky authored
llvm-svn: 191318
-
Rui Ueyama authored
llvm-svn: 191317
-
Hans Wennborg authored
llvm-svn: 191316
-
Benjamin Kramer authored
llvm-svn: 191315
-
Yi Jiang authored
llvm-svn: 191314
-
Benjamin Kramer authored
We really don't want to optimize malloc return value checks away. llvm-svn: 191313
-
Andrew Trick authored
llvm-svn: 191312
-
Fariborz Jahanian authored
class/protocol decls in @implementation and fixup modern rewriter to handle that. // rdar://15066233 llvm-svn: 191311
-
Benjamin Kramer authored
This is safe per C++11 18.6.1.1p3: [operator new returns] a non-null pointer to suitably aligned storage (3.7.4), or else throw a bad_alloc exception. This requirement is binding on a replacement version of this function. Brings us a tiny bit closer to eliminating more vector push_backs. llvm-svn: 191310
-
Benjamin Kramer authored
llvm-svn: 191309
-
Ariel J. Bernal authored
Use getNumOccurrences instead of usina a default constant string. llvm-svn: 191308
-
Ashok Thirumurthi authored
to build out the symbol table as addresses are used, and implements the mechanism for ELF to add stripped symbols from eh_frame. Uses this mechanism to allow disassembly for addresses corresponding to stripped symbols for ELF, and provide hooks to implement this for PE COFF. Also removes eSymbolContextTailCall in favor of an option for ResolveSymbolContextForAddress for consistency with the documentation for eSymbolContextEverything. Essentially, this is just an option for interpreting the so_addr. llvm-svn: 191307
-
Daniel Sanders authored
llvm-svn: 191306
-
Evgeniy Stepanov authored
llvm-svn: 191305
-
Daniel Sanders authored
[mips][msa] Added support for matching ilv[lr], ilvod, and ilvev from normal IR (i.e. not intrinsics) llvm-svn: 191304
-
Benjamin Kramer authored
No functionality change, lots of indentation changes. llvm-svn: 191303
-
Daniel Sanders authored
llvm-svn: 191302
-
Daniel Sanders authored
llvm-svn: 191301
-
Rafael Espindola authored
llvm-svn: 191300
-
Daniel Sanders authored
Most constant BUILD_VECTOR's are matched using ComplexPatterns which cover bitcasted as well as normal vectors. However, it doesn't seem to be possible to match ldi.[bhwd] in a type-agnostic manner (e.g. to support the widest range of immediates, it should be possible to use ldi.b to load v2i64) using TableGen so ldi.[bhwd] is matched using custom code in MipsSEISelDAGToDAG.cpp This made the majority of the constant splat BUILD_VECTOR lowering redundant. The only transformation remaining for constant splats is when an (up-to) 32-bit constant splat is possible but the value does not fit into a 10-bit signed integer. In this case, the BUILD_VECTOR is transformed into a bitcasted BUILD_VECTOR so that fill.[bhw] can be used to splat the vector from a GPR32 register (which is initialized using the usual lui/addui sequence). There are no additional tests since this is a re-implementation of previous functionality. The change is intended to make it easier to implement some of the upcoming instruction selection patches since they can rely on existing support for BUILD_VECTOR's in the DAGCombiner. compare_float.ll changed slightly because a BITCAST is no longer introduced during legalization. llvm-svn: 191299
-
Rafael Espindola authored
This patch turns the -mv* hexagon options into aliases. We should really produce errors for invalid versions in the driver, but this patch preserves the old behavior for now. llvm-svn: 191298
-
Daniel Sanders authored
[mips][msa] Non-constant BUILD_VECTOR's should be expanded to INSERT_VECTOR_ELT instead of memory operations. The resulting code is the same length, but doesnt cause memory traffic or latency. llvm-svn: 191297
-
Daniel Sanders authored
This covers the case where fmax_a can be used to implement ISD::FABS. llvm-svn: 191296
-
Daniel Sanders authored
No functional change. llvm-svn: 191295
-
Alexander Potapenko authored
Since the error is always reported by one of the GCD workers, this will help avoid premature program termination with exit code 0. llvm-svn: 191294
-
Daniel Sanders authored
[mips][msa] Added support for matching andi, ori, nori, and xori from normal IR (i.e. not intrinsics) llvm-svn: 191293
-
Daniel Jasper authored
llvm-svn: 191292
-
Daniel Sanders authored
llvm-svn: 191291
-
Daniel Sanders authored
This required correcting the definition of the bsel and bseli intrinsics. llvm-svn: 191290
-
Patrik Hagglund authored
This fixes PR16724. llvm-svn: 191289
-
Evgeniy Stepanov authored
llvm-svn: 191288
-
Evgeniy Stepanov authored
llvm-svn: 191287
-
Daniel Sanders authored
MIPS SelectionDAG changes: * Added VCEQ, VCL[ET]_[SU] nodes to represent vector comparisons that produce a bitmask. llvm-svn: 191286
-
Daniel Sanders authored
llvm-svn: 191285
-