llvm-svn: 24687

llvm-svn: 24686

llvm-svn: 24685

llvm-svn: 24684

llvm-svn: 24683

  This enables the removal of some explicit type casts.
* Rename immZExt8 to i16ZExt8 as well.

llvm-svn: 24682

llvm-svn: 24681

llvm-svn: 24675

base or index operands being selected.

llvm-svn: 24674

first before the chain.
e.g.
int X;

int foo(int x)
{
  x += X + 37;
  return x;
}

If chain operand is selected first, we would generate:
	movl X, %eax
	movl 4(%esp), %ecx
	leal 37(%ecx,%eax), %eax

rather than
	movl $37, %eax
	addl 4(%esp), %eax
	addl X, %eax

which does not require %ecx. (Due to ADD32rm not matching.)

llvm-svn: 24673

llvm-svn: 24672

llvm-svn: 24671

llvm-svn: 24670

llvm-svn: 24668

llvm-svn: 24664

llvm-svn: 24662

llvm-svn: 24661

llvm-svn: 24660

llvm-svn: 24659

FP select improvements (and likely breakage), oh and crazy people might want to *return* floating point values.  Don't see why myself

llvm-svn: 24658

them in the PPC backend, to simplify some logic out of Select and
SelectAddr.

llvm-svn: 24657

llvm-svn: 24656

* Added X86 dec patterns.

llvm-svn: 24654

hopefully use patterns in the near future.

llvm-svn: 24651

must be a pointer.  This removes a type check out of the code generated by
tblgen for load matching.

llvm-svn: 24650

llvm-svn: 24648

linking the entire program into one bc file.

llvm-svn: 24645

llvm-svn: 24641

llvm-svn: 24639

llvm-svn: 24638

llvm-svn: 24637

false if the match is not profitable. e.g. leal 1(%eax), %eax.
* Added patterns for X86 integer loads and LEA32.

llvm-svn: 24635

llvm-svn: 24631

llvm-svn: 24628

llvm-svn: 24627

more decent branches for FP.  I might have to make some intermediate nodes to actually be able to use the DAG for FPcmp

llvm-svn: 24625

llvm-svn: 24624

amount handling that PPC provides.  These are generated by the lowering code
and prevents the dag combiner from assuming (rightfully) that the shifts
don't only look at 5 bits.  This fixes a miscompilation of crafty with
the new front-end.

llvm-svn: 24615

llvm-svn: 24614

llvm-svn: 24613