llvm-svn: 162514

No test case, this is a generalization of r160260.

llvm-svn: 162485

llvm-svn: 162454

llvm-svn: 162428

Assertion failed: (Start.isValid() == End.isValid() && "Start and end should 
either both be valid or both be invalid!")

when parsing inline asm.  SMLoc assumes that the first char * in the source is
invalid.  However, when parsing an inline asm the mnemonic is at this location.
I don't want to change SMLoc, so use a trivial workaround.

llvm-svn: 162381

Add a getName function to MachineFunction. Use it in places that previously did getFunction()->getName(). Remove includes of Function.h that are no longer needed.

llvm-svn: 162347

Don't cache the MBB in the class. Its only used by one function. Change a for loop over operands to use unsigned instead of int.

llvm-svn: 162344

llvm-svn: 162342

no cost to using memcpy here: the fixed code is optimized by LLVM to perfect
machine code.

llvm-svn: 162311

llvm-svn: 162306

this is the index of the operand that failed to match.

Note: This may cause a buildbot failure due to an API mismatch in clang.  Should
recover with my next commit to clang.

llvm-svn: 162295

llvm-svn: 162270

llvm-svn: 162267

llvm-svn: 162264

llvm-svn: 162263

Replace a break with llvm_unreachable in the default case of a nested switch. Condense code a bit. No functional change.

llvm-svn: 162261

llvm-svn: 162260

llvm-svn: 162257

llvm-svn: 162214

llvm-svn: 162194

llvm-svn: 162193

llvm-svn: 162192

this allows for better code generation.

Added a new DAGCombine transformation to convert FMAX and FMIN to FMANC and
FMINC, which are commutative.

For example:

  movaps  %xmm0, %xmm1
  movsd LC(%rip), %xmm0
  minsd %xmm1, %xmm0

becomes:

  minsd LC(%rip), %xmm0

llvm-svn: 162187

Reapply r162160 with a fix: Optimize Arith->Trunc->SETCC sequence to allow better compare/branch code.

llvm-svn: 162172

Refactor code a bit to reduce number of calls in the final compiled code. No functional change intended.

llvm-svn: 162166

llvm-svn: 162164

arithmetic instructions. However, when small data types are used, a truncate
node appears between the SETCC node and the arithmetic operation. This patch
adds support for this pattern.

Before:
  xorl  %esi, %edi
  testb %dil, %dil
  setne %al
  ret

After:
  xorb  %dil, %sil
  setne %al
  ret

rdar://12081007

llvm-svn: 162160

llvm-svn: 162089

Make ReplaceATOMIC_BINARY_64 a static function. Use a nested switch to reduce to only a single call to it thus allowing it to be inlined by the compiler.

llvm-svn: 162088

llvm-svn: 162012

llvm-svn: 162010

llvm-svn: 161902

- FP_EXTEND only support extending from vectors with matching elements.
  This results in the scalarization of extending to v2f64 from v2f32,
  which will be legalized to v4f32 not matching with v2f64.
- add X86-specific VFPEXT supproting extending from v4f32 to v2f64.
- add BUILD_VECTOR lowering helper to recover back the original
  extending from v4f32 to v2f64.
- test case is enhanced to include different vector width.

llvm-svn: 161894

llvm-svn: 161860

Re-factor intrinsic lowering to combine common parts of similar intrinsics. Reduces compiled code size a little bit.

llvm-svn: 161859

OpTbl1 to OpTbl2 since they have 3 operands and the last operand can be changed
to a memory operand.

PR13576

llvm-svn: 161769

Nehalem, Westmere and Sandy Bridge. AMD also has processor family 6.

llvm-svn: 161763

Tidy up VSETCC lowering code a bit more by adding an llvm_unreachable and putting an a couple if conditions in a better order.

llvm-svn: 161746

llvm-svn: 161745

llvm-svn: 161743