Commits · df6b61255d0918c0212b0f336fd7f4edff060134 · Roger Ferrer / llvm-epi-0.8

May 11, 2011
- Turn this into a table, this will make more sense shortly. · 2a9dbbbb
  Eric Christopher authored May 11, 2011
```
Part of rdar://8470697

llvm-svn: 131200
```
  2a9dbbbb
- Fix encoding of Thumb BLX register instructions. Patch by Koan-Sin Tan. · b745623b
  Owen Anderson authored May 11, 2011
```
llvm-svn: 131189
```
  b745623b
- · 8f971c27
  Nadav Rotem authored May 11, 2011
```
Add custom lowering of X86 vector SRA/SRL/SHL when the shift amount is a splat vector.

llvm-svn: 131179
```
  8f971c27
- Give the 'eh.sjlj.dispatchsetup' intrinsic call the value coming from the setjmp · 50117f81
  Bill Wendling authored May 11, 2011
```
intrinsic call. This prevents it from being reordered so that it appears
*before* the setjmp intrinsic (thus making it completely useless).
<rdar://problem/9409683>

llvm-svn: 131174
```
  50117f81
- Optimize atomic lock or that doesn't use the result value. · 4a34e61e
  Eric Christopher authored May 10, 2011
```
Next up: xor and and.

Part of rdar://8470697

llvm-svn: 131171
```
  4a34e61e
May 10, 2011
- Refactor lock versions of binary operators to be a little less · e3346466
  Eric Christopher authored May 10, 2011
```
cut and paste.

llvm-svn: 131139
```
  e3346466
- First cut at getting debugging support for ARM/MC/ELF/.o · 62f1ab79
  Jason W Kim authored May 10, 2011
```
DWARF stuff also gets fixed up by ELFARMAsmBackend::ApplyFixup(),
but the offset is not guaranteed to be mod 4 == 0 as in text/data. 

llvm-svn: 131137
```
  62f1ab79
- PTX: add PTX 2.3 setting in PTX sub-target. · 72d74e46
  Justin Holewinski authored May 10, 2011
```
Patch by Wei-Ren Chen

llvm-svn: 131123
```
  72d74e46
May 09, 2011
- Fix td file comments for Mips. · 5dc19f91
  Eric Christopher authored May 09, 2011
```
Patch by Liu <proljc@gmail.com>!

llvm-svn: 131086
```
  5dc19f91
- Fixed MC encoding for index_align for VLD1/VST1 (single element from one lane) for size 32 · 92ff16b7
  Mon P Wang authored May 09, 2011
```
llvm-svn: 131085
```
  92ff16b7
May 08, 2011

X86: Add a bunch of peeps for add and sub of SETB. · d724a590

Benjamin Kramer authored May 08, 2011

"b + ((a < b) ? 1 : 0)" compiles into
	cmpl	%esi, %edi
	adcl	$0, %esi
instead of
	cmpl	%esi, %edi
	sbbl	%eax, %eax
	andl	$1, %eax
	addl	%esi, %eax

This saves a register, a false dependency on %eax
(Intel's CPUs still don't ignore it) and it's shorter.

llvm-svn: 131070

d724a590

May 07, 2011
- Eliminate the ARM sub-register indexes that are not needed by the sources. · c1321741
  Jakob Stoklund Olesen authored May 07, 2011
```
Tablegen will invent its own names for these indexes, and the register file is a
bit simpler.

llvm-svn: 131059
```
  c1321741
- Fix the non-MC encoding of pkhbt and pkhtb. · 1e3db02b
  Eric Christopher authored May 07, 2011
```
Patch by Stephen Hines.

llvm-svn: 131045
```
  1e3db02b
- 1. Keep lines in 80 columns. · cbb7fa68
  Akira Hatanaka authored May 06, 2011
```
2. Remove unused function.
3. Correct indentation.

llvm-svn: 131028
```
  cbb7fa68
May 06, 2011
- Make the logic for determining function alignment more explicit. No functionality change. · 2518f837
  Eli Friedman authored May 06, 2011
```
llvm-svn: 131012
```
  2518f837
- Dead code elimination. · a7160966
  Rafael Espindola authored May 06, 2011
```
llvm-svn: 130984
```
  a7160966
- PTX: add PTX 2.3 language target · 11d70b6b
  Justin Holewinski authored May 06, 2011
```
Patch by Wei-Ren Chen

llvm-svn: 130980
```
  11d70b6b
May 05, 2011
- Move PPC Linux to CFI. · bc8e3f8c
  Rafael Espindola authored May 05, 2011
```
llvm-svn: 130951
```
  bc8e3f8c
- PR9848: pandn is not commutative. · f1e2b50a
  Eli Friedman authored May 05, 2011
```
No test because I can't think of any way to write one that won't break quickly.

llvm-svn: 130932
```
  f1e2b50a
- Remove a flag that would set the ".eh" symbol as .globl. MachO was the only one · a48b1375
  Bill Wendling authored May 05, 2011
```
who used this flag, and it now emits CFI and doesn't emit this anymore. All
other targets left this flag "false".
<rdar://problem/8486371>

llvm-svn: 130918
```
  a48b1375
- Fix X86RegisterInfo::getMatchingSuperRegClass for sub_8bit_hi. · 808dca12
  Jakob Stoklund Olesen authored May 04, 2011
```
It is OK for B to be any GR8_ABCD_H superclass, the returned register class
doesn't have to map surjectively onto B.

llvm-svn: 130892
```
  808dca12
May 04, 2011
- Implement SystemZRegisterInfo::getMatchingSuperRegClass to enable cross-class joins. · 093a94cd
  Jakob Stoklund Olesen authored May 04, 2011
```
llvm-svn: 130857
```
  093a94cd
- Do not emit location expression size twice. · 39ecf816
  Devang Patel authored May 04, 2011
```
llvm-svn: 130854
```
  39ecf816
- Fix cmake build. · 2998e6ce
  Rafael Espindola authored May 04, 2011
```
llvm-svn: 130850
```
  2998e6ce
- Prevent instructions using $gp from being placed between a jalr and the... · 23e8ecf1
  Akira Hatanaka authored May 04, 2011
```
Prevent instructions using $gp from being placed between a jalr and the instruction that restores the clobbered $gp.

llvm-svn: 130847
```
  23e8ecf1
- Implement MSP430RegisterInfo::getMatchingSuperRegClass to enable cross-class · 839beb41
  Jakob Stoklund Olesen authored May 04, 2011
```
coalescing.

llvm-svn: 130814
```
  839beb41
- Mark ultra-super-registers QQQQ as call-clobbered instead of the D sub-registers. · f8be385c
  Jakob Stoklund Olesen authored May 03, 2011
```
LiveVariables doesn't understand that clobbering D0 and D1 completely overwrites
Q0, so if Q0 is live-in to a function, its live range will extend beyond a
function call that only clobbers D0 and D1. This shows up in the
ARM/2009-11-01-NeonMoves test case.

LiveVariables should probably implement the much stricter rules for physreg
liveness that RAFast imposes - a physreg is killed by the first use of any
alias.

llvm-svn: 130801
```
  f8be385c
May 03, 2011
- Replace the "movnt" intrinsics with a native store + nontemporal metadata bit. · db0996c8
  Bill Wendling authored May 03, 2011
```
<rdar://problem/8460511>

llvm-svn: 130791
```
  db0996c8
- Fix function MipsRegisterInfo::getRegisterNumbering. · 22fc7238
  Akira Hatanaka authored May 03, 2011
```
llvm-svn: 130774
```
  22fc7238
- Temporarily disable use of divmod compiler-rt functions for iOS. · 09585e1c
  Bob Wilson authored May 03, 2011
```
llvm-svn: 130766
```
  09585e1c
- Fold ARM coprocessor intrinsics patterns into the instructions defs whenever · 86c6e705
  Bruno Cardoso Lopes authored May 03, 2011
```
it's possible.

llvm-svn: 130764
```
  86c6e705
- Add a few ARM coprocessor intrinsics. Testcases included · 168c9005
  Bruno Cardoso Lopes authored May 03, 2011
```
llvm-svn: 130763
```
  168c9005
- Remove unused variables caught by GCC's -Wunused-but-set-variable. · 9c373c1c
  Benjamin Kramer authored May 03, 2011
```
llvm-svn: 130755
```
  9c373c1c
- Add pentium{3,4}m cpus. Patch by Alexander Best! · 9973738b
  Michael J. Spencer authored May 03, 2011
```
llvm-svn: 130749
```
  9973738b
- xmm0 is an implicit parameter in this and so shouldn't be in the · d2aa2413
  Eric Christopher authored May 03, 2011
```
string template.

Fixes rdar://8493866

llvm-svn: 130747
```
  d2aa2413
- Add an unfolded offset field to LSR's Formula record. This is used to · 6136e948
  Dan Gohman authored May 03, 2011
```
model constants which can be added to base registers via add-immediate
instructions which don't require an additional register to materialize
the immediate.

llvm-svn: 130743
```
  6136e948
May 02, 2011
- Apparently the check for direct calls is unnecessary. · 39b56b4b
  Eric Christopher authored May 02, 2011
```
llvm-svn: 130716
```
  39b56b4b
- Add 130690 back. · 5164e6e8
  Rafael Espindola authored May 02, 2011
```
llvm-svn: 130693
```
  5164e6e8
- Revert while I debug the tests that use march but not mtriple. · a3924758
  Rafael Espindola authored May 02, 2011
```
llvm-svn: 130691
```
  a3924758
- Move ppc OS X to cfi too. I am building it on an old ppc mini, but it will take some time. · c2aad4f2
  Rafael Espindola authored May 02, 2011
```
llvm-svn: 130690
```
  c2aad4f2