Commits · dff679f4b66bf46cf1349225f6b57df300d3ed78 · Roger Ferrer / llvm-epi-0.8 · GitLab

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Jan 09, 2011
- rearrange some code, no functionality change. · dff679f4
  Chris Lattner authored Jan 09, 2011
  dff679f4
- Add a note about the inability to model FP -> int conversions which · d011d531
  Chandler Carruth authored Jan 09, 2011
  d011d531
- Step #3 to improving trip count analysis: If we fold · a44274cb
  Chris Lattner authored Jan 09, 2011
  a44274cb
- Step #2 to improve trip count analysis for loops like this: · fc87752d
  Chris Lattner authored Jan 09, 2011
  fc87752d
- Remove MachineRegisterInfo::getLastVirtReg(), it was giving wrong results · d82ac375
  Jakob Stoklund Olesen authored Jan 09, 2011
  d82ac375
- sort this. · 878665b4
  Chris Lattner authored Jan 09, 2011
  878665b4
- Teach TargetRegisterInfo how to cram stack slot indexes in with the virtual and · b83a6b23
  Jakob Stoklund Olesen authored Jan 09, 2011
  b83a6b23
- Add a note about a missed FP optimization. · 0c68a668
  Chandler Carruth authored Jan 09, 2011
  0c68a668
- Fix comment. · 8145f856
  Jakob Stoklund Olesen authored Jan 09, 2011
  8145f856
- fix a few old bugs (found by inspection) where we would zap instructions · caf5c0d0
  Chris Lattner authored Jan 09, 2011
  caf5c0d0
- Add a forgotten VireReg2IndexFunctor. · d65524da
  Jakob Stoklund Olesen authored Jan 09, 2011
  d65524da
- Apply -fPIC to C sources too. · 45539eda
  Oscar Fuentes authored Jan 09, 2011
  45539eda
- Instcombine: Fix pattern where the sext did not dominate the icmp using it · cc21c4aa
  Tobias Grosser authored Jan 09, 2011
  cc21c4aa
- DominatorTree->print() now prints the status of the DFSNumbers correctly · bc453f6e
  Tobias Grosser authored Jan 09, 2011
  bc453f6e
- Rewrite handling of LLVM_ENABLE_PIC. It was being processed after · edfc1842
  Oscar Fuentes authored Jan 09, 2011
  edfc1842
- LoopInstSimplify preserves LoopSimplify. · a42e5915
  Cameron Zwarich authored Jan 09, 2011
  a42e5915
- Another missed memset in std::vector initialization. · 82e6f6a3
  Chandler Carruth authored Jan 09, 2011
  82e6f6a3
- Eliminate some extra hash table lookups. · 8a00d817
  Cameron Zwarich authored Jan 09, 2011
  8a00d817
- Add an informative comment. · a5910d1b
  Cameron Zwarich authored Jan 09, 2011
  a5910d1b
- Fix a cut-paste-o so that the sample code is correct for my last note. · 43f6d1b6
  Chandler Carruth authored Jan 09, 2011
  43f6d1b6
- Another missed optimization of trivial vector code. · ad6e1f05
  Chandler Carruth authored Jan 09, 2011
  ad6e1f05
- Add a note about vector's size-constructor producing dead stores. · f3261930
  Chandler Carruth authored Jan 09, 2011
  f3261930
- Simplify LiveDebugVariables by storing MachineOperand copies locations instead · 9adf5e09
  Jakob Stoklund Olesen authored Jan 09, 2011
  9adf5e09
- Shrink a BitVector that didn't mean to store bits for all physical registers. · 3a9e5c29
  Jakob Stoklund Olesen authored Jan 09, 2011
  3a9e5c29
- Replace TargetRegisterInfo::printReg with a PrintReg class that also works without a TRI instance. · 1331a15b
  Jakob Stoklund Olesen authored Jan 09, 2011
  1331a15b
- Use IndexedMap for MachineRegisterInfo as well. No functional change. · 7f93d8d6
  Jakob Stoklund Olesen authored Jan 09, 2011
  7f93d8d6
- teach SCEV analysis of PHI nodes that PHI recurences formed · 10223a3f
  Chris Lattner authored Jan 09, 2011
  10223a3f
- reduce indentation. Print <nuw> and <nsw> when dumping SCEV AddRec's · a337f5ec
  Chris Lattner authored Jan 09, 2011
  a337f5ec
- Add a note about a missed memset optimization from std::fill. · 5d684c17
  Chandler Carruth authored Jan 09, 2011
  5d684c17
- Fix the last virtual register enumerations. · 4a7b48d5
  Jakob Stoklund Olesen authored Jan 08, 2011
  4a7b48d5
- Fix VirtRegMap to use TRI::index2VirtReg and TRI::virtReg2Index instead of · cf4d5ced
  Jakob Stoklund Olesen authored Jan 08, 2011
  cf4d5ced
- Fix a MachineVerifier loop that probably didn't mean to skip the last two · 6ff70ad3
  Jakob Stoklund Olesen authored Jan 08, 2011
  6ff70ad3
- Don't document exactly how virtual registers are represented as integers. Code · d3438eb2
  Jakob Stoklund Olesen authored Jan 08, 2011
  d3438eb2
- Use an IndexedMap for LiveVariables::VirtRegInfo. · 28d76692
  Jakob Stoklund Olesen authored Jan 08, 2011
  28d76692
- Do not talk about TargetRegisterInfo::FirstVirtualRegister. · a1e03cfb
  Jakob Stoklund Olesen authored Jan 08, 2011
  a1e03cfb
- Use an IndexedMap for LiveOutRegInfo to hide its dependence on... · 793d7b76
  Jakob Stoklund Olesen authored Jan 08, 2011
  793d7b76
Jan 08, 2011
- Fix coding style. · 0939bc37
  Cameron Zwarich authored Jan 08, 2011
  0939bc37
- fix a latent bug in memcpyoptimizer that my recent patches exposed: it wasn't · 7d6433ae
  Chris Lattner authored Jan 08, 2011
  7d6433ae
- tryMergingIntoMemset can only handle constant length memsets. · ff6ed2ac
  Chris Lattner authored Jan 08, 2011
  ff6ed2ac
- Merge memsets followed by neighboring memsets and other stores into · 9a1d63ba
  Chris Lattner authored Jan 08, 2011
  9a1d63ba