llvm-svn: 78663

llvm-svn: 78659

match base only address, i.e. [r] since Thumb2 requires a offset register field.
For those, use [r + imm12] where the immediate is zero.
Note the generated assembly code does not look any different after the patch.
But the bug would have broken the JIT (if there is Thumb2 support) and it can
break later passes which expect the address mode to be well-formed.

llvm-svn: 78658

llvm-svn: 78657

llvm-svn: 78656

llvm-svn: 78655

llvm-svn: 78654

llvm-svn: 78652

llvm-svn: 78651

The register scavenger maintains a DistanceMap that maps MI pointers to their
distance from the top of the current MBB. The DistanceMap is built
incrementally in forward() and in bulk in findFirstUse(). It is used by
scavengeRegister() to determine which candidate register has the longest
unused interval.

Unfortunately the DistanceMap contents can become outdated. The first time
scavengeRegister() is called, the DistanceMap is filled to cover the MBB. If
then instructions are inserted in the MBB (as they always are following
scavengeRegister()), the recorded distances are too short. This causes bad
behaviour in the included test case where a register use /after/ the current
position is ignored because findFirstUse() thinks is is /before/ the current
position. A "using an undefined register" assertion follows promptly.

The fix is to build a fresh DistanceMap at the top of scavengeRegister(), and
discard it after use. This means that DistanceMap is no longer needed as a
RegScavenger member variable, and forward() doesn't need to update it.

The fix then discloses issue number two in the same test case: The candidate
search in scavengeRegister() finds a CSR that has been saved in the prologue,
but is currently unused. It would be both inefficient and wrong to spill such
a register in the emergency spill slot. In the present case, the emergency
slot restore is placed immediately before the normal epilogue restore, leading
to a "Redefining a live register" assertion.

Fix number two: When scavengerRegister() stumbles upon an unused register that
is overwritten later in the MBB, return that register early. It is important
to verify that the register is defined later in the MBB, otherwise it might be
an unspilled CSR.

llvm-svn: 78650

 - Since the function is never called in NDEBUG mode, just dropped the DEBUG()
   uses here.

llvm-svn: 78649

the overloaded vector types allowed floating-point or integer vector elements.
Most of these operations actually depend on the element type, so bitcasting
was not an option.

If you include the vpadd intrinsics that I updated earlier, this gets rid
of 20 intrinsics.

llvm-svn: 78646

llvm-svn: 78642

Passing of indirect arguments starts after return value on the callee's frame.

llvm-svn: 78635

llvm-svn: 78634

llvm-svn: 78632

arguments that are vectors of any size and element type.

llvm-svn: 78631

INT i8.  These instructions are only for interpretation by disassemblers, not
for emission, so they do not as yet have patterns.

llvm-svn: 78630

llvm-svn: 78629

llvm-svn: 78627

and short. Well, it's kinda short. Definitely nasty and brutish.

The front-end generates the register/unregister calls into the SjLj runtime,
call-site indices and landing pad dispatch. The back end fills in the LSDA
with the call-site information provided by the front end. Catch blocks are
not yet implemented.

Built on Darwin and verified no llvm-core "make check" regressions.

llvm-svn: 78625

Enable Thumb2 instruction shrinking (32-bit to 16-bit) pass. Convert a bunch of thumb2 tests to FileCheck.

llvm-svn: 78622

Modified VNInfo. The "copy" member is now a union which holds the copy for a register interval, or the defining register for a stack interval. Access is via getCopy/setCopy and getReg/setReg.

llvm-svn: 78620

MERGE_VALUES nodes. Replacing the result values with the
operands in one MERGE_VALUES node may cause another
MERGE_VALUES node be CSE'd with the first one, and bring
its uses along, so that the first one isn't dead, as this
code expects. Fix this by iterating until the node is
really dead. This fixes PR4699.

llvm-svn: 78619

node after legalize, and remove the workaround code from the
ARM backend.

llvm-svn: 78615

llvm-svn: 78612

llvm-svn: 78610

No functional change.

llvm-svn: 78608

llvm-svn: 78607

llvm-svn: 78604

PIC16 developers, please verify. 

llvm-svn: 78603

llvm-svn: 78602

llvm-svn: 78601

llvm-svn: 78600

llvm-svn: 78598

on target specific operands for testing class membership and converting to
MCInst operands.

llvm-svn: 78597

llvm-svn: 78596

llvm-svn: 78595

llvm-svn: 78594

llvm-svn: 78593