This patch adds support for AArch64 (ARM's 64-bit architecture) to
LLVM in the "experimental" category. Currently, it won't be built
unless requested explicitly.

This initial commit should have support for:
    + Assembly of all scalar (i.e. non-NEON, non-Crypto) instructions
      (except the late addition CRC instructions).
    + CodeGen features required for C++03 and C99.
    + Compilation for the "small" memory model: code+static data <
      4GB.
    + Absolute and position-independent code.
    + GNU-style (i.e. "__thread") TLS.
    + Debugging information.

The principal omission, currently, is performance tuning.

This patch excludes the NEON support also reviewed due to an outbreak of
batshit insanity in our legal department. That will be committed soon bringing
the changes to precisely what has been approved.

Further reviews would be gratefully received.

llvm-svn: 174054

llvm-svn: 174009

register for inline asm. This conforms to how gcc allows for effective
casting of inputs into gprs (fprs is already handled).

llvm-svn: 174008

On systems which support the QPX vector instructions, the stack must be
32-byte aligned.

llvm-svn: 173993

llvm-svn: 173987

This should have gone in with r173973.

llvm-svn: 173984

This is the first commit of a large series which will add support for the
QPX vector instruction set to the PowerPC backend. This instruction set is
used on the IBM Blue Gene/Q supercomputers.

llvm-svn: 173973

More details in this thread: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20130128/163783.html

Patch by JF Bastien

llvm-svn: 173943

llvm-svn: 173941

llvm-svn: 173939

llvm-svn: 173888

llvm-svn: 173887

llvm-svn: 173886

setting of ELF header e_flags.

Contributer: Jack Carter
 
llvm-svn: 173885

setting of ELF header e_flags.

Contributer: Jack Carter
 
llvm-svn: 173884

and update ELF header e_flags.

Currently gathering information such as symbol, 
section and data is done by collecting it in an 
MCAssembler object. From MCAssembler and MCAsmLayout 
objects ELFObjectWriter::WriteObject() forms and 
streams out the ELF object file.

This patch just adds a few members to the MCAssember 
class to store and access the e_flag settings. It 
allows for runtime additions to the e_flag by 
assembler directives. The standalone assembler can 
get to MCAssembler from getParser().getStreamer().getAssembler().

This patch is the generic infrastructure and will be
followed by patches for ARM and Mips for their target 
specific use.

Contributer: Jack Carter
 
llvm-svn: 173882

Patch by Sasa Stankovic.

llvm-svn: 173862

Changing ARMBaseTargetMachine to return ARMTargetLowering intead of
the generic one (similar to x86 code).

Tests showing which instructions were added to cast when necessary
or cost zero when not. Downcast to 16 bits are not lowered in NEON,
so costs are not there yet.

llvm-svn: 173849

llvm-svn: 173816

llvm-svn: 173813

llvm-svn: 173812

llvm-svn: 173807

llvm-svn: 173798

The ARM and Thumb variants of LDREXD and STREXD have different constraints and
take different operands. Previously the code expanding atomic operations didn't
take this into account and asserted in Thumb mode.

llvm-svn: 173780

llvm-svn: 173777

conditions are met:
1. They share the same operand and are in the same BB.
2. Both outputs are used.
3. The target has a native instruction that maps to ISD::FSINCOS node or
   the target provides a sincos library call.

Implemented the generic optimization in sdisel and enabled it for
Mac OSX. Also added an additional optimization for x86_64 Mac OSX by
using an alternative entry point __sincos_stret which returns the two
results in xmm0 / xmm1.

rdar://13087969
PR13204

llvm-svn: 173755

This function will be used in future commits.

llvm-svn: 173729

llvm-svn: 173674

Add missing break in 256-bit palignr comment printing. No test case yet because the comment itself is still wrong.

llvm-svn: 173669

llvm-svn: 173667

llvm-svn: 173664

llvm-svn: 173649

These instructions are not targeted by the compiler but they are
needed for the MC layer.

llvm-svn: 173634

These instructions are not targeted by the compiler but they are
needed for the MC layer.

llvm-svn: 173629

These instructions are not targeted by the compiler but they are
needed for the MC layer.

llvm-svn: 173624

These instructions are not targeted by the compiler but they are
needed for the MC layer.

llvm-svn: 173623

Further removal of the introspective AttributeWithIndex thing. Also fix the #includes.

llvm-svn: 173599

llvm-svn: 173572

This catches many cases where we can emit a more efficient shuffle for a
specific mask or when the mask contains undefs. Once the splat is lowered to
unpacks we can't do that anymore.

There is a possibility of moving the promotion after pshufb matching, but I'm
not sure if pshufb with a mask loaded from memory is faster than 3 shuffles, so
I avoided that for now.

llvm-svn: 173569

llvm-svn: 173563