Commits · e16d16ae4182ee44d1cf2ac27566fdc7726528b5 · Roger Ferrer / llvm-epi-0.8 · GitLab

This project is archived. Its data is read-only.

Nov 18, 2014
- [FastISel][AArch64] Also allow folding of sign-/zero-extend and logical · e16d16ae
  Chad Rosier authored Nov 18, 2014
  e16d16ae
- [FastISel][AArch64] Follow-up fix for "Fix shift-immediate emission for "zero" shifts." · cdda9308
  Juergen Ributzka authored Nov 18, 2014
  cdda9308
- R600/SI: Move SIFixSGPRCopies to inst selector passes · 162c1010
  Matt Arsenault authored Nov 18, 2014
  162c1010
- R600/SI: Make sure resource descriptors are always stored in SGPRs · f0a2107c
  Tom Stellard authored Nov 18, 2014
  f0a2107c
- [FastISel][AArch64] Fix shift-immediate emission for "zero" shifts. · 4328fd94
  Juergen Ributzka authored Nov 18, 2014
  4328fd94
Nov 17, 2014
- [X86] Use ADD/SUB instead of INC/DEC for Haswell and Broadwell CPUs · 7de210bd
  Alexey Volkov authored Nov 17, 2014
  7de210bd
- Fix ARM triple parsing · 609bf923
  Renato Golin authored Nov 17, 2014
  609bf923
- [Thumb1] Re-write emitThumbRegPlusImmediate · 970b0d57
  Oliver Stannard authored Nov 17, 2014
  970b0d57
- Fix optimisations of SELECT_CC which assumed result is boolean · d29db9b9
  Oliver Stannard authored Nov 17, 2014
  d29db9b9
- Fix CR/LF line endings in test case. · a61a1903
  Bob Wilson authored Nov 17, 2014
  a61a1903
Nov 15, 2014
- [DAG] Improved target independent vector shuffle folding logic. · e13a0b81
  Andrea Di Biagio authored Nov 15, 2014
  e13a0b81
- [X86][SSE] Improve legal SHUFP and PSHUFD shuffle matching · 6d675f4e
  Simon Pilgrim authored Nov 15, 2014
  6d675f4e
- R600: Permute operands when selecting legacy min/max · 36094d78
  Matt Arsenault authored Nov 15, 2014
  36094d78
Nov 14, 2014
- ARM: refactor .cfi_def_cfa_offset emission. · 603d3165
  Tim Northover authored Nov 14, 2014
  603d3165
- ARM: correctly calculate the offset of FP in its push. · 9d2d218f
  Tim Northover authored Nov 14, 2014
  9d2d218f
- ARM: simplify test. · a0691c89
  Tim Northover authored Nov 14, 2014
  a0691c89
- R600/SI: Fix spilling of m0 register · bdd567d8
  Tom Stellard authored Nov 14, 2014
  bdd567d8
- R600/SI: Combine min3/max3 instructions · cc3c2b39
  Matt Arsenault authored Nov 14, 2014
  cc3c2b39
- R600/SI: Fix verifier error from a branch on IMPLICIT_DEF · 72858935
  Matt Arsenault authored Nov 14, 2014
  72858935
- R600/SI: Match integer min / max instructions · d28a7fde
  Matt Arsenault authored Nov 14, 2014
  d28a7fde
- R600/SI: Use S_BFE_I64 for 64-bit sext_inreg · 94812216
  Matt Arsenault authored Nov 14, 2014
  94812216
- [AVX512] Add 512b masked integer shift by immediate patterns. · 04400449
  Cameron McInally authored Nov 14, 2014
  04400449
- [PowerPC] Add VSX builtins for vec_div · 76746929
  Bill Schmidt authored Nov 14, 2014
  76746929
- X86: use getConstant rather than getTargetConstant behind BUILD_VECTOR. · d3be12a6
  Tim Northover authored Nov 14, 2014
  d3be12a6
- Allow the use of functions as typeinfo in landingpad clauses · 283bc2ed
  Reid Kleckner authored Nov 14, 2014
  283bc2ed
- First stage of call lowering for Mips fast-isel · d5c4196c
  Reed Kotler authored Nov 13, 2014
  d5c4196c
- R600/SI: Fix fmin_legacy / fmax_legacy matching for SI · da59f3de
  Matt Arsenault authored Nov 13, 2014
  da59f3de
Nov 13, 2014
- [x86] Add some tests for specific patterns of lane-flips combined with · 99b261ce
  Chandler Carruth authored Nov 13, 2014
  99b261ce
- [FastISel][AArch64] Don't bail during simple GEP instruction selection. · 0af310d0
  Juergen Ributzka authored Nov 13, 2014
  0af310d0
- R600/SI: Use s_movk_i32 · 77849929
  Matt Arsenault authored Nov 13, 2014
  77849929
- R600: Fix assert on empty function · 6ef66144
  Matt Arsenault authored Nov 13, 2014
  6ef66144
- R600: Error on initializer for LDS. · cc8d3b87
  Matt Arsenault authored Nov 13, 2014
  cc8d3b87
- R600/SI: Get rid of FCLAMP_SI pseudo · 1cffa4c1
  Matt Arsenault authored Nov 13, 2014
  1cffa4c1
- R600/SI: Allow commuting with src2_modifiers · 581a7a69
  Matt Arsenault authored Nov 13, 2014
  581a7a69
- R600/SI: Allow commuting some 3 op instructions · 95e48668
  Matt Arsenault authored Nov 13, 2014
  95e48668
- ARM: allow constpool entry to be moved to the user's block in all cases. · 631cc9ce
  Tim Northover authored Nov 13, 2014
  631cc9ce
- ARM: avoid duplicating branches during constant islands. · ab85dcc7
  Tim Northover authored Nov 13, 2014
  ab85dcc7
- ARM: add @llvm.arm.space intrinsic for testing ConstantIslands. · 650b0ee5
  Tim Northover authored Nov 13, 2014
  650b0ee5
- AVX-512: SINT_TO_FP cost model and some bugfixes · d5e95b57
  Elena Demikhovsky authored Nov 13, 2014
  d5e95b57
- [x86] Teach the vector shuffle lowering to make a more nuanced decision · fee91883
  Chandler Carruth authored Nov 13, 2014
  fee91883